参数资料
型号: ICS1893AFLFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 80/136页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装: 1,000
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 48-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 48-SSOP
包装: 带卷 (TR)
其它名称: 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
48
Chapter 7
Functional Blocks
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
7.5.4
10Base-T Operation: Idle
An ICS1893AF transmits Normal Link Pulses (that is, 10Base-T Idles) on its MDI in the absence of data (that
is, when the MAC/repeater is not requiring it to transmit any data). During this time the link is Idle, and the
ICS1893AF periodically transmits link pulses at a rate of one link pulse every 16 ms in compliance with the
ISO/IEC 8802-3 standard. In 10Base-T mode, the ICS1893AF continues transmitting link pulses even while
receiving data. This situation does not generate a Collision Detect signal (COL) because link pulses indicate
an idle state for a link.
7.5.5
10Base-T Operation: Link Monitor
When an ICS1893AF is in 10Base-T mode, its Link Monitor Function observes the data received by the
10Base-T Twisted-Pair Receiver to determine the link status. The results of this continual monitoring are
stored in the Link Status bit. The Station Management entity (STA) can access the Link Status bit in either
the Status Register (bit 1.2) or the QuickPoll Detailed Status Register (bit 17.0).
When the Link Status bit is:
Zero, either a valid link is not established or the link is momentarily dropped since either the last read of
the Link Status bit or the last reset of the ICS1893AF.
One, a valid link is established.
The ICS1893AF Link Status bit is a latching low (LL) bit. (For more information on latching high and latching
The criteria used by the Link Monitor Function to declare a link either valid (that is, ‘established’ or ‘up’) or
invalid (that is, ‘failed’ or ‘down’) depends upon these factors: the present state of the link, whether its
Smart Squelch function is enabled, and the incoming data.
When the 10Base-T link is:
Invalid, and the Smart Squelch function is:
– Disabled (bit 18.0 is logic one), the Link Monitor Function must detect at least one of the following
events before transitioning its link from the invalid state to the valid state:
More than seven, ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data
– Enabled (bit 18.0 is logic zero), the Link Monitor Function must detect at least one of the following
events before transitioning its link from the invalid state to the valid state:
More than seven, ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data followed by a valid IDL
Valid, and the Smart Squelch function is:
– Disabled (bit 18.0 is logic one), the Link Monitor Function continues to report its link as valid as long
as it continues to detect any of the following:
ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data
– Enabled (bit 18.0 is logic zero), the Link Monitor Function continues to report its link as valid as long
as it continues to detect any of the following:
ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data followed by a valid IDL
Valid, the Link Monitor Function declares the link as invalid if it receives neither data nor NLPs (that is,
the link shows either no activity or inconsistent activity) for more than 81 to 83 ms. In this case the Link
Monitor Function sets the Link Status bit to logic zero.
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ICS1893AFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC(0.295",7.50mm 宽) 供应商设备封装:16-SOIC 包装:带卷 (TR)
ICS1893AG 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGI 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGILF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGLF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM