参数资料
型号: ICS1893AFLFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 24/136页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装: 1,000
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 48-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 48-SSOP
包装: 带卷 (TR)
其它名称: 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
12
Chapter 2
Conventions and Nomenclature
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
Chapter 2
Conventions and Nomenclature
Table 2-1 lists and explains the conventions and nomenclature used throughout this data sheet.
Table 2-1.
Conventions and Nomenclature
Item
Convention / Nomenclature
Bits
A bit in a register is identified using the format ‘register.bit’. For example, bit
0.15 is bit 15 of register 0.
When a colon is used with bits, it indicates the range of bits. For example,
bits 1.15:11 are bits 15, 14, 13, 12, and 11 of register 1.
For a range of bits, the order is always from the most-significant bit to the
least-significant bit.
Code groups
Within this table, see the item ‘Symbols’
Colon (:)
Within this table, see these items:
‘Bits’
‘Pin (or signal) names’
Numbers
As a default, all numbers use the decimal system (that is, base 10) unless
followed by a lowercase letter. A string of numbers followed by a lowercase
letter:
– A ‘b’ represents a binary (base 2) number
– An ‘h’ represents a hexadecimal (base 16) number
– An ‘o’ represents an octal (base 8) number
All numerical references to registers use decimal notation (and not
hexadecimal).
Pin (or signal) names
All pin or signal names are provided in capital letters.
A pin name that includes a forward slash ‘/’ is a multi-function, configuration
pin. These pins provide the ability to select between two ICS1893AF
functions. The name provided:
– Before the ‘/’ indicates the pin name and function when the signal level
on the pin is logic zero.
– After the ‘/’ indicates the pin name and function when the signal level on
the pin is logic one.
For example, the HW/SW pin selects between Hardware (HW) mode and
Software (SW) mode. When the signal level on the HW/SW pin is logic:
– Zero, the ICS1893AF Hardware mode is selected.
– One, the ICS1893AF Software mode is selected.
An ‘n’ appended to the end of a pin name or signal name (such as
RESETn) indicates an active-low operation.
When a colon is used with pin or signal names, it indicates a range. For
example, TXD[3:0] represents pins/signals TXD3, TXD2, TXD1, and TXD0.
When pin name abbreviations are spelled out, words in parentheses
indicate additional description that is not part of the pin name abbreviation.
Registers
A bit in a register is identified using the format ‘register.bit’. For example, bit
0.15 is bit 15 of register 0.
All numerical references to registers use decimal notation (and not
hexadecimal).
When register name abbreviations are spelled out, words in parentheses
indicate additional description that is not part of the register name
abbreviation.
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ICS1893AFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:PHYceiver™ 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC(0.295",7.50mm 宽) 供应商设备封装:16-SOIC 包装:带卷 (TR)
ICS1893AG 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGI 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGILF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGLF 制造商:ICS 制造商全称:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM