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参数资料
| 型号： | IDT72T6360L6BBGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324 |
| 封装： | 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-324 |
| 文件页数： | 42/51页 |
| 文件大小： | 508K |
| 代理商： | IDT72T6360L6BBGI |
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47
IDT72T6360 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x9, x18, x36 BIT WIDE CONFIGURATION
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
OCTOBER 10, 2005
THE INSTRUCTION REGISTER
The instruction register (IR) is eight bits long and tells the device what
instructionistobeexecuted.Informationcontainedintheinstructionincludesthe
modeofoperation(eithernormalmode,inwhichthedeviceperformsitsnormal
logic function, or test mode, in which the normal logic function is inhibited or
altered), the test operation to be performed, which of the four data registers is
to be selected for inclusion in the scan path during data-register scans, and the
sourceofdatatobecapturedintotheselecteddataregisterduringCapture-DR.
TEST DATA REGISTER
The Test Data register contains three test data registers: the Bypass, the
Boundary Scan register and Device ID register.
These registers are connected in parallel between a common serial input
and a common serial data output.
The following sections provide a brief description of each element. For a
completedescription,refertotheIEEEStandardTestAccessPortSpecification
(IEEE Std. 1149.1-1990).
TEST BYPASS REGISTER
The register is used to allow test data to flow through the device from TDI
toTDO.Itcontainsasinglestageshiftregisterforaminimumlengthintheserial
path. When the bypass register is selected by an instruction, the shift register
stage is set to a logic zero on the rising edge of TCLK when the TAP controller
is in the Capture-DR state.
The operation of the bypass register should not have any effect on the
operation of the device in response to the BYPASS instruction.
THE BOUNDARY-SCAN REGISTER
The boundary-scan register (BSR) contains one boundary-scan cell
(BSC)foreachnormal-functioninputpinandoneBSCforeachnormal-function
I/O pin (one single cell for both input data and output data). The BSR is used
1)tostoretestdatathatistobeappliedexternallytothedeviceoutputpins,and/
or 2) to capture data that appears internally at the outputs of the normal on-chip
logic and/or externally at the device input pins.
THE DEVICE IDENTIFICATION REGISTER
The Device Identification Register is a Read Only 32-bit register used to
specify the manufacturer, part number and version of the device to be
determined through the TAP in response to the IDCODE instruction.
IDT JEDEC ID number is 0xB3. This translates to 0x33 when the parity is
dropped in the 11-bit Manufacturer ID field.
For the IDT72T6360, the Part Number field contains the following values:
IDT72T6360 JTAG Device Identification Register
31(MSB)
28 27
12 11
1 0(LSB)
Version (4 bits)
Part Number (16-bit) Manufacturer ID (11-bit)
0000
0033 (hex)
1
JTAG INSTRUCTION REGISTER
The Instruction register allows an instruction to be serially input into the
devicewhentheTAPcontrollerisintheShift-IRstate.Theinstructionisdecoded
to perform the following:
Select test data registers that may operate while the instruction is
current. The other test data registers should not interfere with chip
operation and the selected data register.
Definetheserialtestdataregisterpaththatisusedtoshiftdatabetween
TDI and TDO during data register scanning.
The Instruction Register is a 4 bit field (i.e. IR3, IR2, IR1, IR0) to decode
16 different possible instructions. Instructions are decoded as follows.
Hex
Instruction
Function
Value
0000
EXTEST
Test external pins
0001
SAMPLE/PRELOAD Select boundary scan register
0002
IDCODE
Selectschipidentificationregister
0003
HIGH-IMPEDANCE Puts all outputs in high-impedance state
0008
CLAMP
Fix the output chains to scan chain values
000F
BYPASS
Select bypass register
Private
Several combinations are private (for IDT
internal use). Do not use codes other than
those identified above.
JTAG INSTRUCTION REGISTER DECODING
The following sections provide a brief description of each instruction. For
acompletedescriptionrefertotheIEEEStandardTestAccessPortSpecification
(IEEE Std. 1149.1-1990).
EXTEST
The required EXTEST instruction places the device into an external
boundary-test mode and selects the boundary-scan register to be connected
between TDI and TDO. During this instruction, the boundary-scan register is
accessed to drive test data off-chip via the boundary outputs and receive test
data off-chip via the boundary inputs. As such, the EXTEST instruction is the
workhorse of IEEE. Std 1149.1, providing for probe-less testing of solder-joint
opens/shorts and of logic cluster function.
SAMPLE/PRELOAD
TherequiredSAMPLE/PRELOADinstructionallowsthedevicetoremainin
a normal functional mode and selects the boundary-scan register to be
connected between TDI and TDO. During this instruction, the boundary-scan
register can be accessed via a data scan operation, to take a sample of the
functional data entering and leaving the device. This instruction is also used to
preload test data into the boundary-scan register before loading an EXTEST
instruction.
IDCODE
TheoptionalIDCODEinstructionallowsthedevicetoremaininitsfunctional
mode and selects the optional device identification register to be connected
betweenTDIandTDO.Thedeviceidentificationregisterisa32-bitshiftregister
containing information regarding the device manufacturer, device type, and
versioncode.Accessingthedeviceidentificationregisterdoesnotinterferewith
the operation of the device. Also, access to the device identification register
should be immediately available, via a TAP data-scan operation, after power-
up of the device or by otherwise moving to the Test-Logic-Reset state.
Device
Part# Field
IDT72T6360
0437 (hex)
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相关代理商/技术参数 |
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| IDT72T6360L7-5BB | 功能描述:IC FLOW-CTRL 48BIT 7-5NS 324-BGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT72T6360L7-5BBI | 功能描述:IC FLOW-CTRL 48BIT 7-5NS 324-BGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT72T6480L10BB | 功能描述:IC FLOW-CTRL 48BIT 10NS 324-BGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT72T6480L10BBI | 功能描述:IC FLOW-CTRL 48BIT 10NS 324-BGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT72T6480L7-5BB | 功能描述:IC FLOW-CTRL 48BIT 7-5NS 324-BGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
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