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参数资料
| 型号： | M38D59GC-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件页数： | 32/142页 |
| 文件大小： | 2004K |
| 代理商： | M38D59GC-XXXFP |
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Rev.3.04
May 20, 2008
Page 127 of 134
REJ03B0158-0304
38D5 Group
10. Write to Timer X
(1) Timer X can select either writing data to both the latch and
the timer at the same time or writing data only by the timer
X write control bit (b3) in the timer X mode register
(address 002D16). When writing to the latch only, if a value
is written to the timer X address, the value is set into the
reload latch and the timer is updated at the next underflow.
After a reset release, if a value is written to the timer X
address, the value is set into the timer and the timer latch at
the same time, because they are written simultaneously.
When writing to the latch only, if the write timing to the
high-order reload latch and the underflow timing are almost
the same, the value is set into the timer and the timer latch at
the same time. At this time, count is stopped during write
operation to the high-order reload latch.
(2) Switch the frequency division or count source* while the
timer count is stopped.
*This also applies when the frequency divider output is selected
as the timer count source and the count source is switched in
conjunction with a transition between operating modes (on-
chip oscillator mode, XIN mode, or low-speed mode). Be
careful when changing settings in the CPU mode register.
11. Setting Timer X Mode Register
When PWM mode or IGBT output mode is set, be sure to set the
write control bit in the timer X mode register to “1” (writing to
latch only). After writing to the timer X register (high-order), the
contents of both registers are simultaneously reflected in the
output waveform at the next underflow.
12. Timer X Output Control Functions
To use the output control functions (INT1 and INT2), set the
levels of INT1 and INT2 to “H” for the falling edge active or to
“L” for the rising edge active before switching to IGBT output
mode.
13. CNTR0 Active Edge Selection
(1) Setting the CNTR0 active edge switch bits also affects the
interrupt active edge at the same time.
(2) When the pulse width is measured, set bit 7 of the CNTR0
active edge switch bits to “0”.
14. When Timer X Pulse Width Measurement Mode
Used
When timer X pulse mode measurement mode is used, enable the
event counter wind control data (bit 5 of timer X mode register
(address 002D16)) by setting to “0”.
<Reason>
If the event counter window control data (bit 5 of timer X mode
r e gister (add ress 002 D 16 )) is set to “1 ” (disabled) to
enable/disable the CNTR0 input, the input is not accepted after
the timer 1 underflow.
15. CNTR1 Active Edge Selection
Setting the CNTR1 active edge switch bits also affects the
interrupt active edge at the same time.
However, in pulse width HL continuous HL measurement mode,
the CNTR1 interrupt request is generated at both rising and
falling edges of the pin regardless of the settings of the CNTR1
active edge switch bits.
16. Read from/Write to Timer Y
(1) When reading from/writing to timer Y, read from/write to
both the high-order and low-order bytes of timer Y. To read
the value, read the high-order bytes first and the low-order
bytes next. To write the value, write the low-order bytes first
and the high-order bytes next.
Writing/reading should be preformed in 16-bit units. If
write/read operation is changed in progress, normal
operation will not be performed.
(2) Timer Y can select either writing data to both the latch and
the timer at the same time or writing data only by the timer
Y write control bit (b0) in the timer Y control register
(address 003916). When writing to the latch only, if a value
is written to the timer Y address, the value is set into the
reload latch and the timer is updated at the next underflow.
After a reset release, if a value is written to the timer Y
address, the value is set into the timer and the timer latch at
the same time, because they are written simultaneously.
When writing to the latch only, if the write timing to the
high-order reload latch and the underflow timing are almost
the same, the value is set into the timer and the timer latch at
the same time. At this time, count is stopped during write
operation to the high-order reload latch.
(3) Switch the frequency division or count source* while the
timer count is stopped.
*This also applies when the frequency divider output is selected
as the timer count source and the count source is switched in
conjunction with a transition between operating modes (on-
chip oscillator mode, XIN mode, or low-speed mode). Be
careful when changing settings in the CPU mode register.
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相关代理商/技术参数 |
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|---|---|
| M38D59GFFP#U0 | 功能描述:IC 740/38D5 MCU QZ-ROM 80QFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| M38D59GFHP#U0 | 功能描述:IC 740/38D5 MCU QZ-ROM 80LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| M38D59T-RLFS | 功能描述:BOARD EMULATOR FOR 38D5 GROUP RoHS:否 类别:编程器，开发系统 >> 内电路编程器、仿真器以及调试器 系列:- 产品变化通告:Development Systems Discontinuation 19/Jul/2010 标准包装:1 系列:* 类型:* 适用于相关产品:* 所含物品:* |
| M38DC-15 | 制造商:M/A-COM Technology Solutions 功能描述:MIXER(SPEC UX1015) - Bulk |
| M38K00F1-16FP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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