Rev.3.04
May 20, 2008
REJ03B0158-0304
38D5 Group
Fig. 31 Block diagram of Timer Y
Timer Y
Timer Y is a 16-bit timer. The timer Y count source can be
selected by setting the timer Y mode register. XCIN can be
selected as the count source. When XCIN is selected as the count
source, counting can be performed regardless of XIN oscillation
or on-chip oscillator oscillation.
Four operating modes can be selected for timer Y by the timer Y
mode register. Also, the real time port can be controlled.
(1) Timer Mode
The timer Y count source can be selected by setting the timer Y
mode register.
(2) Period Measurement Mode
The interrupt request is generated at rising or falling edge of
CNTR1 pin input signal. Simultaneously, the value in timer Y
latch is reloaded in timer Y and timer Y continues counting.
Except for that, this mode operates just as in the timer mode.
The timer value just before the reloading at rising or falling of
CNTR1 pin input is retained until the timer Y is read once after
the reload.
The rising or falling timing of CNTR1 pin input is found by
CNTR1 interrupt. When using this mode, set the port sharing the
CNTR1 pin to input mode.
(3) Event Counter Mode
The timer counts signals input through the CNTR1 pin.
Except for that, this mode operates just as in the timer mode.
When using this mode, set the port sharing the CNTR1 pin to
input mode.
(4) Pulse Width HL Continuously Measurement Mode
The interrupt request is generated at both rising and falling edges
of CNTR1 pin input signal. Except for that, this mode operates
just as in the period measurement mode. When using this mode,
set the port sharing the CNTR1 pin to input mode.
(5) Real Time Port Control
When the real time port function is valid, data for the real time
port is output from ports P50 and P51 each time the timer Y
underflows.(However, if the real time port control bit is changed
from “0” to “1” after the data for real time port is set, data is
output independent of the timer Y operation.) When the data for
the real time port is changed while the real time port function is
valid, the changed data is output at the next underflow of timer
Y. Before using this function, set the P50 and P51 port direction
registers to output.
Data bus
Real time port 1
control bit
Real time port 2
control bit
Q D
Latch
Q D
Latch
P51 direction
register
P51 latch
RTP1 data for real
time port
P50 direction
register
P50 latch
RTP0 data for real
time port
“1”
Timer Y (low-order) latch (8) Timer Y (high-order) latch (8)
“0”
CNTR1 active
edge switch bit
“10”
P51/RTP1/AN1
P50/RTP0/AN0
CNTR1
Falling edge detection
Period measurement
mode
Timer Y
interrupt request
Pulse width HL continuous
measurement mode
Timer Y operating
mode bits
CNTR1
interrupt request
Rising edge detection
Count source selection bit
XcIN
“1”
φSOURCE
Real time port 2 control bit
Timer Y mode register
write signal
Timer Y operating mode bits
“00”, “01”, “11”
“1”
“0”
“1”
“0”
“1”
“0”
“00”, “01”, “10”
“11”
“0”
Timer Y write control bit
Timer Y count
stop bit
“0”
“1”
Timer Y mode register
write signal
Real time port 1 control bit
Timer Y (low-order)(8)
Timer Y (high-order)(8)
Frequency divider
Timer Y dividing frequency selection bit
2
Note1:
φSOURCE indicates the followings:
XIN input in the frequency/2, 4, or 8 mode
On-chip oscillator divided by 4 in the on-chip oscillator mode
Sub-clock in the low-speed mode
(1)