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参数资料
| 型号： | MCM16Y1BACFT16 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| 封装： | QFP-160 |
| 文件页数： | 100/138页 |
| 文件大小： | 784K |
| 代理商： | MCM16Y1BACFT16 |
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MOTOROLA
MC68HC16Y1
64
MC68HC16Y1TS/D
Internal chip select logic is inhibited when discrete output or alternate function are assigned.
Port size is determined when a pin is assigned as a chip select. When a pin is assigned to an 8-bit port,
the chip select is asserted at all addresses within the block range. If a pin is assigned to a 16-bit port,
the upper/lower byte eld of the option register selects the byte with which the chip select is associated.
3.10.3 Base Address Registers
A base address is the starting address for the block enabled by a given chip select. Block size deter-
mines the extent of the block above the base address. Each chip select has an associated base register,
so that an efcient address map can be constructed for each application. If a chip select is assigned an
address used by a microcontroller module, the module has priority — the chip select does not respond
to an access.
ADDR[23:20] will be at the same logic level as ADDR19 during internal CPU master operation. AD-
DR[23:20] must match ADDR19 for the chip select to be active.
BLKSZ — Block Size Field
This field determines the size of the block above the base address that must be enabled by the chip
select. The table below shows bit encoding for the base address registers block size field.
ADDR[23:20] will be at the same logic level as ADDR19 during normal operation.
ADDR[15:3] — Base Address Field
This field sets the starting address of a particular address space. The address compare logic uses only
the most significant bits to match an address within a block — the value of the base address must be a
multiple of block size. Base address register diagrams show how base register bits correspond to ad-
dress lines.
CSBARBT — Chip Select Base Address Register Boot ROM
$YFFA48
15
14
13
12
11
10
9876543210
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ
RESET:
0000000000000111
CSBAR0 – CSBAR10 — Chip Select Base Address Registers
$YFFA4C–$YFFA74
15
14
13
12
11
10
9876543210
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ
RESET:
0
000000000000000
Block Size Field
Block Size
Address Lines Compared
000
2 K
ADDR[23:11]
001
8 K
ADDR[23:13]
010
16 K
ADDR[23:14]
011
64 K
ADDR[23:16]
100
128 K
ADDR[23:17]
101
256 K
ADDR[23:18]
110
512 K
ADDR[23:19]
111
512 K
ADDR[23:20]
相关PDF资料 |
PDF描述 |
|---|---|
| MCM16Y1BGCFT16 | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
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| MCV14AI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| MCV14ATI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| MCV14AI/P | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDIP14 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MCM16Z2BCFC16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC16B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
| MCM16Z2BCFC25 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
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