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参数资料
| 型号： | MCM16Y1BACFT16 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| 封装： | QFP-160 |
| 文件页数： | 138/138页 |
| 文件大小： | 784K |
| 代理商： | MCM16Y1BACFT16 |
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MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
99
ADSTAT contains information related to the status of a conversion sequence.
SCF — Sequence Complete Flag
0 = Sequence not complete
1 = Sequence complete
SCF is set at the end of the conversion sequence when SCAN is cleared, and at the end of the first
conversion sequence when SCAN is set. SCF is cleared when ADCTL1 is written and a new conversion
sequence begins.
CCTR[2:0] — Conversion Counter Field
This field reflects the contents of the conversion counter pointer in either four or eight count conversion
sequence. The value corresponds to the number of the next result register to be written, and thus indi-
cates which channel is being converted.
CCF[7:0] — Conversion Complete Field
Each bit in this field corresponds to an A/D result register (CCF7 to RSLT7, etc.). A bit is set when con-
version for the corresponding channel is complete, and remains set until the result register is read. It is
cleared when the register is read.
RSLT0–RSLT7 — A/D Result Registers
$YFF710–$YFF73E
The result registers are used to store data after conversion is complete. Each register can be read from
three different addresses in the register block. Data format depends on the address from which it is
read.
RJURR — Unsigned Right-Justified Format
$YFF710–$YFF71F
Conversion result is unsigned right-justified data. Bits [9:0] are used for 10-bit resolution, bits [7:0] are
used for 8-bit conversion (bits [9:8] are zero). Bits [15:10] always return zero when read.
LJSRR — Signed Left-Justified Format
$YFF720–$YFF72F
Conversion result is signed left-justified data. Bits [15:6] are used for 10-bit resolution, bits [15:8] are
used for 8-bit conversion (bits [7:6] are zero). Although the ADC is unipolar, it is assumed that the zero
point is halfway between low and high reference when this format is used — for positive input, bit 15 =
0, for negative input, bit 15 = 1. Bits [5:0] always return zero when read.
LJURR — Unsigned Left-Justified Format
$YFF730–$YFF73F
Conversion result is unsigned left-justified data. Bits [15:6] are used for 10-bit resolution, bits [15:8] are
used for 8-bit conversion (bits [7:6] are zero). Bits [5:0] always return zero when read.
ADSTAT — ADC Status Register
$YFF70E
15
14
11
10
8
7
0
SCF
NOT USED
CCTR
CCF
RESET:
0
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相关代理商/技术参数 |
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| MCM16Z2BCFC16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC16B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
| MCM16Z2BCFC25 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
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