参数资料
型号: MCM16Y1BACFT16
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP160
封装: QFP-160
文件页数: 74/138页
文件大小: 784K
代理商: MCM16Y1BACFT16
MOTOROLA
MC68HC16Y1
40
MC68HC16Y1TS/D
3.2.3 Single-Chip Mode
In single-chip mode (BERR = 0), pins DATA[15:0] are configured as two 8-bit I/O ports. ADDR[18:3] are
configured as two 8-bit I/O ports. There is no external data bus path. Expanded mode configuration op-
tions are not available: I/O ports A, B, C, E, F, G, and H are always selected. BERR can be tied low
permanently to select single-chip mode.
3.3 Emulation Support
The SCIM contains logic that can be used to replace on-chip ports externally. It also contains special
support logic to allow external emulation of internal ROM. This emulation support allows system devel-
opment of a single-chip application in expanded mode.
Emulator mode is a special type of 16-bit expanded operation. It is entered by holding DATA10 low,
BERR high, and DATA1 low during reset. In emulator mode, all port A, B, E, G, and H data and data
direction registers and the port E pin assignment register are mapped externally. Port C data, port F
data and data direction registers, and port F pin assignment register are accessible normally in emulator
mode.
An emulator chip select (CSE) is asserted whenever any of the externally-mapped registers are ad-
dressed. The signal is asserted on the falling edge of AS. The SCIM does not respond to these access-
es, allowing external logic, such as a port replacement unit (PRU) to respond. Accesses to externally-
mapped registers require three clock cycles.
Table 12 Single-Chip Mode Reset Configuration
Pin(s) Affected
Function
CSBOOT
CSBOOT 8-Bit
ADDR[18:10]
PA[7:0]
ADDR[9:3]
PB[7:0]
BR/CS0
CS0
FC0/CS3/PC0
FC1/PC1
FC2/CS5/PC2
ADDR19/CS6/PC3
ADDR20/CS7/PC4
ADDR21/CS8/PC5
ADDR22/CS9/PC6
PC[6:0]
ADDR23/CS10/ECLK
DSACK0/PE0
DSACK1/PE1
AVEC/PE2
PE3
DS/PE4
AS/PE5
SIZ0/PE6
SIZ1/PE7
PE[7:0]
MODCLK/PF0
IRQ[7:1]/PF[7:1]
PF0
PF[7:1]
DATA[15:8]
PG[7:0]
DATA[7:0]
PH[7:0]
BGACK/CSE
BG/CSM
BGACK
BG
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