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| 型号： | MCM16Y1BACFT16 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| 封装： | QFP-160 |
| 文件页数： | 123/138页 |
| 文件大小： | 784K |
| 代理商： | MCM16Y1BACFT16 |
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MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
85
5.3 GPT Registers
The GPTMCR contains parameters for interfacing to the CPU and the intermodule bus.
STOP — Stop Clocks
0 = Internal clocks not shut down
1 = Internal clocks shut down
FRZ1 — FREEZE Response
Reserved; has no effect
FRZ0 — FREEZE Response
0 = Ignore FREEZE
1 = FREEZE the current state of the GPT
STOPP — Stop Prescaler
0 = Normal operation
1 = Stop prescaler and pulse accumulator from incrementing. Ignore changes to input pins.
INCP — Increment Prescaler
0 = Has no meaning
1 = If STOPP is asserted, increment prescaler once and clock input synchronizers once.
SUPV — Supervisor/Unrestricted Data Space
0 = Registers with access controlled by SUPV are unrestricted (FC2 is a don't care).
1 = Registers with access controlled by SUPV are restricted when FC2 = 1.
Because the CPU16 in the MC68HC16Y1 operates in supervisor mode only (FC2 is always logic level
one), this bit has no effect.
IARB[3:0] — Interrupt Arbitration ID
Each module that generates interrupts has an IARB field. The value in this field is used to arbitrate be-
tween simultaneous interrupt requests of the same priority. The reset value of all IARB fields other than
that of the SCIM is $0 (lowest priority), to prevent priority conflict during initialization. The IARB field
must be initialized to a value between $F (highest priority) and $1 (lowest priority), or subsequent inter-
rupt requests will be identified by the CPU as spurious.
MTR — GPT Module Test Register (Reserved)
$YFF902
This address is currently unused and will return zeros if read. It is reserved for GPT factory test.
Priority Adjust Field — This field specifies an interrupt to be advanced to the highest priority.
Interrupt Request Level — This field specifies the priority level of interrupts generated by the GPT.
Vector Base Address — This is the most significant nibble of interrupt vectors generated by the GPT.
GPTMCR — GPT Module Configuration Register
$YFF900
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STOP
FRZ
STOPP
INCP
0
SUPV
0
IARB
RESET:
0
1
0
ICR — GPT Interrupt Configuration Register
$YFF904
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PRIORITY ADJUST
0
INT REQUEST LEVEL
VECTOR BASE ADDRESS
0
RESET:
0
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相关代理商/技术参数 |
参数描述 |
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| MCM16Z2BCFC16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC16B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20B1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
| MCM16Z2BCFC25 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
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