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| 型号： | MT28C3224P20 |
| 厂商： | Micron Technology, Inc. |
| 元件分类： | DRAM |
| 英文描述： | FLASH AND SRAM COMBO MEMORY |
| 中文描述： | 闪存和SRAM式内存 |
| 文件页数： | 16/42页 |
| 文件大小： | 498K |
| 代理商： | MT28C3224P20 |
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F
16
2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3224P20_3.p65 – Rev. 3, Pub. 7/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
2 MEG x 16 PAGE FLASH
256K x 16 SRAM COMBO MEMORY
ADVANCE
STATUS
BIT #
SR7
STATUS REGISTER BIT
WRITE
STATE
MACHINE
STATUS
(WSMS) Check write state machine bit first to determine word
1 = Ready
program or block erase completion, before checking
0 = Busy
program or erase status bits.
ERASE SUSPEND STATUS (ESS)
When ERASE SUSPEND is issued, WSM halts execution and
1 = BLOCK ERASE Suspended
sets both WSMS and ESS bits to “1.” ESS bit remains set to
0 = BLOCK ERASE in
“1” until an ERASE RESUME command is issued.
Progress/Completed
ERASE STATUS (ES)
When this bit is set to “1,” WSM has applied the maximum
1 = Error in Block Erasure
number of erase pulses to the block and is still unable to
0 = Successful BLOCK ERASE
verify successful block erasure.
PROGRAM STATUS (PS)
When this bit is set to “1,” WSM has attempted but failed to
1 = Error in PROGRAM
program a word.
0 = Successful PROGRAM
V
PP
STATUS (V
PP
S)
The V
PP
status bit does not provide continuous indication
1 = V
PP
Low Detect, Operation Abort
of the V
PP
level. The WSM interrogates the V
PP
level only
0 = V
PP
= OK
after the program or erase command sequences have been
entered and informs the system if V
PP
< 0.9V. The V
PP
level is
also checked before the PROGRAM/ERASE operation is
verified by the WSM. A factory option allows PROGRAM or
ERASE at 0V, in which case SR3 is held at “0.”
PROGRAM SUSPEND STATUS (PSS)
When PROGRAM SUSPEND is issued, WSM halts execution
1 = PROGRAM Suspended
and sets both WSM and PSS bits to “1.” PSS bit remains set to
0 = PROGRAM in Progress/Completed
“1” until a PROGRAM RESUME command is issued.
BLOCK LOCK STATUS (BLS)
If a PROGRAM or ERASE operation is attempted to one of
1 = PROGRAM/ERASE Attempted on a
the locked blocks, this is set by the WSM. The operation
Locked Block; Operation Aborted
specified is aborted, and the device is returned to read status
0 = No Operation to Locked Blocks
mode.
RESERVED FOR FUTURE
This bit is reserved for future.
ENHANCEMENT
DESCRIPTION
SR6
SR5
SR4
SR3
SR2
SR1
SR0
Table 7
Status Register Bit Definition
WSMS
7
ESS
6
ES
5
PS
4
V
PP
S
3
PSS
2
BLS
1
R
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT28C3224P20FL-80 BET | 制造商:Micron Technology Inc 功能描述: |
| MT28C3224P20FL-80 BET TR | 制造商:Micron Technology Inc 功能描述: |
| MT28C6428P18 | 制造商:MICRON 制造商全称:Micron Technology 功能描述:FLASH AND SRAM COMBO MEMORY |
| MT28C6428P18FM-85 BET | 制造商:Micron Technology Inc 功能描述: |
| MT28C6428P18FM-85 BET TR | 制造商:Micron Technology Inc 功能描述: |
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