MT46V32M16TG-75ELIT PDF资料下载(7/82 页)32M X 16 DDR DRAM, 0.75 ns, PDSO66

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参数资料

型号：	MT46V32M16TG-75ELIT
元件分类：	DRAM
英文描述：	32M X 16 DDR DRAM, 0.75 ns, PDSO66
封装：	0.400 INCH, PLASTIC, TSOP-66
文件页数：	7/82页
文件大小：	2855K
代理商：	MT46V32M16TG-75ELIT

512Mb: x4, x8, x16

DDR SDRAM

09005aef80a1d9e7

Micron Technology, Inc., reserves the right to change products or specifications without notice.

512MBDDRx4x8x16_2.fm - Rev. H 7/04 EN

the DLL, it should always be followed by a LOAD

MODE REGISTER command to select normal operat-

ing mode.

All other combinations of values for A7–A12 are

reserved for future use and/or test modes. Test modes

and reserved states should not be used, as unknown

operation or incompatibility with future versions may

result.

Extended Mode Register

The extended mode register controls functions

beyond those controlled by the mode register; these

additional functions are DLL enable/disable, and out-

put drive strength. These functions are controlled via

the bits shown in Figure 9. The extended mode register

is programmed via the LOAD MODE REGISTER com-

mand to the mode register (with BA0 = 1 and BA1 = 0)

and will retain the stored information until it is pro-

grammed again or the device loses power. The

enabling of the DLL should always be followed by a

LOAD MODE REGISTER command to the mode regis-

ter (BA0/BA1 both LOW) to reset the DLL.

The extended mode register must be loaded when

all banks are idle and no bursts are in progress, and the

controller must wait the specified time before initiat-

ing any subsequent operation. Violating either of these

requirements could result in unspecified operation.

Output Drive Strength

The normal drive strength for all outputs are speci-

fied to be SSTL2, Class II. The x16 supports a program-

mable option for reduced drive. This option is

intended for the support of the lighter load and/or

point-to-point environments. The selection of the

reduced drive strength will alter the DQ pins and DQS

pins from SSTL2, Class II drive strength to a reduced

drive strength, which is approximately 54 percent of

the SSTL2, Class II drive strength.

DLL Enable/Disable

When the part is running without the DLL enabled,

device functionality may be altered. The DLL must be

enabled for normal operation. DLL enable is required

during power-up initialization and upon returning to

normal operation after having disabled the DLL for the

purpose of debug or evaluation. (When the device

exits self refresh mode, the DLL is enabled automati-

cally.) Any time the DLL is enabled, 200 clock cycles

with CKE HIGH must occur before a READ command

can be issued.

Figure 9: Extended Mode Register

Definition

NOTE:

1. E14 and E13 (BA1 and BA0) must be “0, 1” to

select the Extended Mode Register vs. the base

Mode Register.

2. The reduced drive strength option is not sup-

ported on the x4 and x8 versions, and is only

available on the x16 version.

3. The QFC# option is not supported.

Operating Mode

Reserved

–

Valid

–

DLL

Enable

Disable

DLL

A7 A6 A5 A4 A3

A2 A1 A0

Extended Mode

Address Bus

Drive Strength

Normal

Reduced

E12

E23

E1,

Operating Mode

A10

A11

A12

BA1 BA0

–

E6 E5

–

E10

E11

–

E12

–

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相关代理商/技术参数	参数描述
MT46V32M16TG-75L	制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM
MT46V32M16TG-75Z	制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM
MT46V32M16TG-75ZL	制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM

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