参数资料
型号: MT46V32M8FG-6TIT:G
元件分类: DRAM
英文描述: 32M X 8 DDR DRAM, 0.7 ns, PBGA60
封装: (8 X 14) MM, PLASTIC, FBGA-60
文件页数: 62/93页
文件大小: 3632K
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
63
2003 Micron Technology, Inc. All rights reserved.
256Mb: x4, x8, x16 DDR SDRAM
Operations
Figure 28:
Consecutive READ Bursts
Notes:
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4 or BL = 8 (if BL = 4, the bursts are concatenated; if BL = 8, the second burst interrupts
the first).
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order follow-
ing DO b.
5. Shown with nominal tAC, tDQSCK, and tDQSQ.
6. Example applies only when READ commands are issued to same device.
READ
NOP
READ
NOP
READ
NOP
READ
NOP
CL = 2
CL = 2.5
DO
n
DO
b
DO
n
DO
b
T0
T1
T2
T3
T2n
T3n
T4
T5
T4n
T5n
T0
T1
T2
T3
T2n
T3n
T4
T5
T4n
T5n
READ
NOP
READ
NOP
CL = 3
DO
n
DO
b
T0
T1
T2
T3
T3n
T4
T5
T4n
T5n
Bank,
Col n
Bank,
Col b
Bank,
Col n
Bank,
Col b
Bank,
Col n
Bank,
Col b
Command
Address
DQS
DQ
CK#
CK
Command
Address
DQS
DQ
CK#
CK
Command
Address
DQS
DQ
CK#
CK
Transitioning Data
Don’t Care
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