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STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
267
Register 091H: E1 FRMR Maintenance Mode Options
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
BIT2C
SMFASC
TS16C
RAIC
Unused
AISC
EXCRCERR
X
1
0
0
0
X
0
X
R/W
R/W
R/W
R/W
R/W
R
When the E1/T1B bit of the Global Configuration register is a logic 0 or the UNF
bit of the Receive Options register is a logic 1, this register is held reset.
BIT2C:
The BIT2C bit enables the additional criterion that loss of frame is declared
when bit 2 in time slot 0 of NFAS frames has been received in error on 3
consecutive occasions: a logic 1 in the BIT2C position enables declaration of
loss of frame alignment when bit 2 is received in error; a logic 0 in BIT2C
enables declaration of loss of frame alignment based on the absence of FAS
frames only.
SMFASC:
The SMFASC bit selects the criterion used to declare loss of signaling
multiframe alignment signal: a logic 0 in the SMFASC bit position enables
declaration of loss of signaling multiframe alignment when 2 consecutive
multiframe alignment patterns have been received in error; a logic 1 in the
SMFASC bit position enables declaration of loss of signaling multiframe when
2 consecutive multiframe alignment patterns have been received in error or
when time slot 16 contains logic 0 in all bit positions for 1 or 2 multiframes
based on the criterion selected by TS16C.
TS16C:
The TS16C bit selects the criterion used to declare loss of signaling
multiframe alignment signal when enabled by the SMFASC: a logic 0 in the
TS16C bit position enables declaration of loss of signaling multiframe
alignment when time slot 16 contains logic 0 in all bit positions for 1
multiframe; a logic 1 in the TS16C bit position enables declaration of loss of