STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
357
Figure 17 - Transmit Backplane: CMS=0, FE=1, DE=1, BTFP is Output
BTFP
BTPCM
BTCLK
F-bit
Figure 18 - Transmit Backplane: CMS=0, FE=1, DE=0, BTFP is Output
BTFP
BTPCM
BTCLK
F-bit
1
2
3
Figure 17 and Figure 18 above indicate the relationship between BTCLK, BTFP,
and BTPCM with two settings for the BTIF’s CMS, FE, and DE register bits in T1
mode with BTFP configured as an output (FPMODE=0). When FE and DE have
the same value, the frame pulse is updated on the same clock edge as the data
is sampled. When FE and DE have opposite values, the frame pulse is updated
three clock edge before the data is sampled. In the above figures, the
TSOFF[6:0], BOFF_EN and BOFF[2:0] register bits are logic zero.
Figure 19
- Transmit Backplane at 1.544 Mbit/s (T1 mode)
F
6
0
2
3
4
5
1
7
7
6
4
5
7
0
1
2
3
C
A
B
D
D
BTFP
1.544 MHz BTCLK
(CMS = 0)
BTPCM
BTSIG
Time Slot 23
Time Slot 0
F-bit or parity
6
4
5
0
1
2
3
C
A
B
D
C
A
B
D
7
Time Slot 1
X
X
X
A 1.544 Mbit/s backplane in T1 mode is configured by setting RATE[1:0] of the
Transmit Backplane Configuration register to 'b00 and the E1/T1B bit of the
Global Configuration register to a logic 0. In Figure 19, BTFP, BTPCM and
BTSIG are configured to be updated on the falling edge of BTCLK by setting FE
and DE bits of the Transmit Backplane Configuration register to logic 0. The
TSOFF[6:0], BOFF_EN and BOFF[2:0] register bits are all logic 0, therefore
BTFP is expected to be aligned to the first bit of the frame.
A 1.544 Mbit/s backplane in T1 mode is configured by setting the RATE[1:0] bits
of the Transmit Backplane Configuration register to 'b00 and the E1/T1B bit of