- 您现在的位置：买卖IC网 > PDF目录21888 > SFCF8192H4BK4SA-I-QT-553-SMA (Swissbit NA Inc)FLASH SLC UDMA/MDMA/PIO 8G PDF资料下载
参数资料
| 型号： | SFCF8192H4BK4SA-I-QT-553-SMA |
| 厂商： | Swissbit NA Inc |
| 文件页数： | 16/99页 |
| 文件大小： | 0K |
| 描述： | FLASH SLC UDMA/MDMA/PIO 8G |
| 视频文件： | Swissbit Manufacturing Overview |
| RoHS指令信息： | Environment Protection Declaration |
| 标准包装： | 20 |
| 系列： | C-300 |
| 存储容量： | 8GB |
| 存储器类型： | CompactFlash? |
| 其它名称： | 1052-1012 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页
Signal Name
Dir.
Pin
Description
This signal is a DMA Request that is used for DMA data
transfers between host and device. It shall be asserted by the
device when it is ready to transfer data to or from the host. For
Multiword DMA transfers, the direction of data transfer is
controlled by – IORD and – IOWR. This signal is used in a
handshake manner with – DMACK, i.e., the device shall wait
until the host asserts – DMACK before negating DMARQ, and
reasserting DMARQ if there is more data to transfer.
DMARQ shall not be driven when the device is not selected.
DMARQ
(True IDE Mode)
– IORD
(PC Card Memory Mode)
– IORD
(PC Card I/O Mode)
– IORD
(True IDE Mode)
While a DMA operation is in progress, -CS0 and – CS1 shall be
held negated and the width of the transfers shall be 16 bits.
If there is no hardware support for DMA mode in the host, this
output signal is not used and should not be connected at the
host. In this case, the BIOS must report that DMA mode is not
supported by the host so that device drivers will not attempt
DMA mode.
A host that does not support DMA mode and implements both
PCMCIA and True-IDE modes of operation need not alter the
PCMCIA mode connections while in True-IDE mode as long as
this does not prevent proper operation in any mode.
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal
gates I/O data onto the bus from the CompactFlash Storage
Card when the card is configured to use the I/O
interface.
In True IDE Mode, while Ultra DMA mode is not active, this
signal has the same function as in PC Card I/O Mode.
-HDMARDY
(True IDE Mode – In Ultra
DMA Protocol DMA
Read)
I
34
In True IDE Mode when Ultra DMA mode DMA Read is active,
this signal is asserted by the host to indicate that the host is
read
to receive Ultra DMA data-in bursts. The host may negate
-HDMARDY to pause an Ultra DMA transfer.
In True IDE Mode when Ultra DMA mode DMA Write is active,
HSTROBE
(True IDE Mode – In Ultra
DMA Protocol DMA
Write)
– CD1, – CD2
(PC Card Memory Mode)
this signal is the data out strobe generated by the host. Both
the
rising and falling edge of HSTROBE cause data to be latched by
the device. The host may stop generating HSTROBE edges to
pause an Ultra DMA data-out burst.
These Card Detect pins are connected to ground on the
CompactFlash Storage Card. They are used by the
host to determine that the CompactFlash Storage Card or is fully
– CD1, – CD2
(PC Card I/O Mode)
– CD1, – CD2
(True IDE Mode)
O
26, 25
inserted into its socket.
This signal is the same for all modes.
This signal is the same for all modes.
These input signals are used both to select the card and to
indicate to the card whether a byte or a word operation is being
performed. – CE2 always accesses the odd byte of the word.
– CE1, – CE2
(PC Card Memory Mode)
-CE1 accesses the even byte or the Odd byte of the word
depending on A0 and – CE2. A multiplexing scheme based on
A0,
-CE1, -CE2 allows 8 bit hosts to access all data on D0-D7. See
– CE1, – CE2
(PC Card I/O Mode)
– CS0, – CS1
(True IDE Mode)
I
7, 32
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode, -CS0 is the chip select for the task file
registers while – CS1 is used to select the Alternate Status
Register and the Device Control Register.
While – DMACK is asserted, -CS0 and – CS1 shall be held
negated and the width of the transfers shall be 16 bits.
– CSEL
(PC Card Memory Mode)
I
39
This signal is not used for this mode, but should be connected
by
the host to PC Card A25 or grounded by the host.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.51
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-300_data_sheet_CF-HxBK_Rev151.doc
Page 16 of 99
相关PDF资料 |
PDF描述 |
|---|---|
| TSL245R-LF | IC LIGHT TO FREQUENCY CONV 3PIN |
| TSL235R-LF | IC LIGHT TO FREQUENCY CONV 3PIN |
| SFCF4096H1BO2TO-I-D1-523-SMA | FLASH SLC UDMA/MDMA/PIO 4G |
| MLBAWT-A1-0000-0000DZ | LED XLAMP ML-B WHITE SMD |
| MLBAWT-A1-0000-0000DV | LED XLAMP ML-B WHITE SMD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SFC-FUSE-CAB | 功能描述:熔丝座配件 SFC-FUSE-CAB RoHS:否 制造商:Schurter 产品:Caps 类型:Slot Knob 用于:FEU, FEU (Med), FAU, FAC |
| SFC-HC | 制造商:PANASONIC ELECTRIC WORKS ACSD 功能描述:Handy Controller For SF4C Series Only 制造商:PANASONIC ELECTRIC WORKS - ACSD 功能描述:HANDY CONTROLLER FOR SF4C |
| SFCIC5000102MX1 | 功能描述:电磁干扰直通滤波器 500V .001uF X7R 20% C Filter RoHS:否 制造商:Tusonix 电容:0.027 uF 电压额定值:50 V 电路类型: 最大直流电流: 最大直流电阻: 工作温度范围:- 55 C to + 125 C 系列:4403 螺纹大小:4-40 UNC-2A |
| SFCIC5000103MX1 | 功能描述:电磁干扰直通滤波器 500V .01uF X7R C FILTER W/NUTS RoHS:否 制造商:Tusonix 电容:0.027 uF 电压额定值:50 V 电路类型: 最大直流电流: 最大直流电阻: 工作温度范围:- 55 C to + 125 C 系列:4403 螺纹大小:4-40 UNC-2A |
| SFCIC5000220ZC1 | 功能描述:电磁干扰直通滤波器 500V 22pF C0G C FILTER W/NUTS RoHS:否 制造商:Tusonix 电容:0.027 uF 电压额定值:50 V 电路类型: 最大直流电流: 最大直流电阻: 工作温度范围:- 55 C to + 125 C 系列:4403 螺纹大小:4-40 UNC-2A |
发布紧急采购，3分钟左右您将得到回复。