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型号： SPC5634MF1MMG80
厂商： Freescale Semiconductor
文件页数： 110/122页
文件大小： 0K
描述： IC MCU FLASH 1.5M 94K 208-PBGA
标准包装： 90
系列： MPC56xx Qorivva
核心处理器： e200z3
芯体尺寸： 32-位
速度： 80MHz
连通性： CAN，EBI/EMI，LIN，SCI，SPI，UART/USART
外围设备： DMA，POR，PWM，WDT
输入/输出数： 114
程序存储器容量： 1.5MB（1.5M x 8）
程序存储器类型： 闪存
RAM 容量： 94K x 8
电压 - 电源 (Vcc/Vdd)： 4.5 V ~ 5.25 V
数据转换器： A/D 34x12b
振荡器型： 内部
工作温度： -40°C ~ 150°C
封装/外壳： 208-BGA
包装： 托盘
MPC5634M Microcontroller Data Sheet, Rev. 9
Electrical characteristics
Freescale Semiconductor
88
Fast
CC
D
2.5/2.5
1.2/1.2
10
00
CC
D
2.5/2.5
1.2/1.2
20
01
CC
D
2.5/2.5
1.2/1.2
30
10
CC
D
2.5/2.5
1.2/1.2
50
118
pad_i_hv12
CC
D
0.5/0.5
3/3
0.4/0.4
1.5/1.5
0.5
N/A
pull_hv
CC
D
NA
6000
5000/5000
50
N/A
1 These are worst case values that are estimated from simulation and not tested. The values in the table are
simulated at fSYS = 80 MHz, VDD = 1.14 V to 1.32 V, VDDE = 3 V to 3.6 V, VDDEH = 3 V to 3.6 V, TA = TL to TH.
2 This parameter is supplied for reference and is not guaranteed by design and not tested.
3 Delay and rise/fall are measured to 20% or 80% of the respective signal.
4 This parameter is guaranteed by characterization before qualification rather than 100% tested.
5 In high swing mode, high/low swing pad Vol and Voh values are the same as those of the slew controlled output
pads
6 Medium Slew-Rate Controlled Output buffer. Contains an input buffer and weak pullup/pulldown.
7 Output delay is shown in Figure 8. Add a maximum of one system clock to the output delay for delay with respect
to system clock.
8 Can be used on the tester
9 This drive select value is not supported. If selected, it will be approximately equal to 11.
10 Slow Slew-Rate Controlled Output buffer. Contains an input buffer and weak pullup/pulldown.
11 Slow Slew-Rate Controlled Output buffer. Contains an input buffer and weak pullup/pulldown.
12 Stand alone input buffer. Also has weak pull-up/pull-down.
Table 35. Pad AC specifications (1.8 V)
Pad Type
C
Output Delay (ns)1,2
Low-to-High /
High-to-Low
1 This parameter is supplied for reference and is not guaranteed by design and not tested.
2 Delay and rise/fall are measured to 20% or 80% of the respective signal.
Rise/Fall Edge (ns)3
3 This parameter is guaranteed by characterization before qualification rather than 100% tested.
Drive Load
(pF)
SRC/DSC
Min
Max
Min
Max
MSB,LSB
Fast
CC
D
3.0/3.0
2.0/1.5
10
00
CC
D
3.0/3.0
2.0/1.5
20
01
CC
D
3.0/3.0
2.0/1.5
30
10
CC
D
3.0/3.0
2.0/1.5
50
114
4 Can be used on the tester.
Table 34. Pad AC specifications (3.3 V)1 (continued)
Pad Type
C
Output Delay (ns)2,3
Low-to-High /
High-to-Low
Rise/Fall Edge (ns)3,4
Drive Load
(pF)
SRC/DSC
Min
Max
Min
Max
MSB,LSB
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