参数资料
型号: SPC5634MF1MMG80
厂商: Freescale Semiconductor
文件页数: 79/122页
文件大小: 0K
描述: IC MCU FLASH 1.5M 94K 208-PBGA
标准包装: 90
系列: MPC56xx Qorivva
核心处理器: e200z3
芯体尺寸: 32-位
速度: 80MHz
连通性: CAN,EBI/EMI,LIN,SCI,SPI,UART/USART
外围设备: DMA,POR,PWM,WDT
输入/输出数: 114
程序存储器容量: 1.5MB(1.5M x 8)
程序存储器类型: 闪存
RAM 容量: 94K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.25 V
数据转换器: A/D 34x12b
振荡器型: 内部
工作温度: -40°C ~ 150°C
封装/外壳: 208-BGA
包装: 托盘
MPC5634M Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor
6
— Enabled out of reset
Enhanced modular I/O system (eMIOS)
— 16 timer channels (up to 14 channels in 144 LQFP)
— 24-bit timer resolution
— Supports a subset of the timer modes found in eMIOS on MPC5554
— 3 selectable time bases plus shared time or angle counter bus from eTPU2
— DMA and interrupt request support
— Motor control capability
Second-generation enhanced time processor unit (eTPU2)
— Object-code compatible with eTPU—no changes are required to hardware or software if only eTPU features are
used
— Intelligent co-processor designed for timing control
— High level tools, assembler and compiler available
— 32 channels (each channel has dedicated I/O pin in all packages)
— 24-bit timer resolution
— 14 KB code memory and 3 KB data memory
— Double match and capture on all channels
— Angle clock hardware support
— Shared time or angle counter bus with eMIOS
— DMA and interrupt request support
— Nexus Class 1 debug support
— eTPU2 enhancements
– Counters and channels can run at full system clock speed
– Software watchdog
– Real-time performance monitor
– Instruction set enhancements for smaller more flexible code generation
– Programmable channel mode for customization of channel operation
Enhanced queued A/D converter (eQADC)
— Two independent on-chip redundant signed digit (RSD) cyclic ADCs
– 8-, 10-, and 12-bit resolution
– Differential conversions
– Targets up to 10-bit accuracy at 500 KSample/s (ADC_CLK = 7.5 MHz) and 8-bit accuracy at 1 MSample/s
(ADC_CLK = 15 MHz) for differential conversions
– Differential channels include variable gain amplifier (VGA) for improved dynamic range (
1; 2; 4)
– Differential channels include programmable pull-up and pull-down resistors for biasing and sensor diagnostics
(200 k
; 100 k; low value of 5 k)
– Single-ended signal range from 0 to 5 V
– Sample times of 2 (default), 8, 64 or 128 ADC clock cycles
– Provides time stamp information when requested
– Parallel interface to eQADC command FIFOs (CFIFOs) and result FIFOs (RFIFOs)
– Supports both right-justified unsigned and signed formats for conversion results
– Temperature sensor to enable measurement of die temperature
– Ability to measure all power supply pins directly
— Automatic application of ADC calibration constants
– Provision of reference voltages (25% VREF and 75% VREF) for ADC calibration purposes
—Up to 341 input channels available to the two on-chip ADCs
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