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参数资料
型号： ST72E85A5G0
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, UVPROM, 4.332 MHz, MICROCONTROLLER, CQFP80
封装： WINDOWED, CERAMIC, QFP- 80
文件页数： 98/117页
文件大小： 748K
代理商： ST72E85A5G0
81/117
ST7285C
ST7 ADDRESSING MODES(Cont’d)
Indexed (no offset, short, long)
The required data byte to do the operation is found
by its memory address, which is defined by the un-
signed addition of an index register (X or Y) with
an offset which follows the op-code.
The indirect addressing mode consists of three
sub-modes:
Indexed (no offset):
There is no offset, (no extra byte after the op-
code), but only allows 00 - FF addressing space.
Indexed (short):
The offset is a byte, thus require only one byte af-
ter the op-code, but only allow 00 - 1FE address-
ing space.
Indexed (long):
The offset is a word, thus allowing 64Kb address-
ing space, but requires 2 bytes after the op-code.
Indirect (short, long):
The required data byte to do the operation is found
by its memory address, located in memory (point-
er).
The pointer address follows the op-code. The indi-
rect addressing mode consists of two sub-modes:
Indirect (short):
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - FF addressing space, and
requires 1 byte after the op-code.
Indirect (long):
The pointer address is a byte, the pointer size is a
word, thus allowing 64Kb addressing space, and
requires 1 byte after the op-code.
No Offset, Long and
Short Indexed Instruc.
Function
LD
Load
CP
Compare
AND, OR, XOR
Logical Operations
ADC, ADD, SUB, SBC
Arithmetic Additions/Sub-
stractions operations
BCP
Bit Compare
No Offset and Short
Indexed Inst. Only
Function
CLR
Clear
INC, DEC
Increment/Decrement
TNZ
Test Negative or Zero
CPL, NEG
1 or 2 Complement
BSET, BRES
Bit Operations
BTJT, BTJF
Bit Test and Jump Operations
SLL, SRL, SRA, RLC,
RRC
Shift and Rotate Operations
SWAP
Swap Nibbles
CALL, JP
Call or Jump subroutine
Available Long and Short
Indir ect Instructions
Function
LD
Load
CP
Compare
AND, OR, XOR
Logical Operations
ADC, ADD, SUB, SBC
Arithmetic Additions/Sub-
stractions operations
BCP
Bit Compare
Short Indirect
Instructions Only
Fun ction
CLR
Clear
INC, DEC
Increment/Decrement
TNZ
Test Negative or Zero
CPL, NEG
1 or 2 Complement
BSET, BRES
Bit Operations
BTJT, BTJF
Bit Test and Jump Operations
SLL, SRL, SRA,
RLC, RRC
Shift and Rotate Operations
SWAP
Swap Nibbles
CALL, JP
Call or Jump subroutine
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