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Electrical Specifications
122
March 2004 Revised October 2004
SGUS051A
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 626.
Table 626. XINTF Clock Configurations
Mode
SYSCLKOUT
XTIMCLK
XCLKOUT
1
Example:
150 MHz
SYSCLKOUT
150 MHz
SYSCLKOUT
150 MHz
2
Example:
150 MHz
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
3
Example:
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
4
Example:
150 MHz
1/2 SYSCLKOUT
75 MHz
1/4 SYSCLKOUT
37.5 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in Figure 628.
XTIMING0
XTIMING1
XTIMING2
XTIMING6
XTIMING7
XBANK
LEAD/ACTIVE/TRAIL
1
0
XCLKOUT
/2
XTIMCLK
1
0
/2
C28x
CPU
XINTCNF2
(CLKMODE)
XINTCNF2
(XTIMCLK)
Default Value after reset
SYSCLKOUT
XINTCNF2
(CLKOFF)
1
0
0
Figure 628. Relationship Between XTIMCLK and SYSCLKOUT
6.23
XINTF Signal Alignment to XCLKOUT
For each XINTF access, the number of lead, active, and trail cycles is based on the internal clock XTIMCLK.
Strobes such as XRD, XWE, and zone chip-select (XZCS) change state in relationship to the rising edge of
XTIMCLK. The external clock, XCLKOUT, can be configured to be either equal to or one-half the frequency
of XTIMCLK.
For the case where XCLKOUT = XTIMCLK, all of the XINTF strobes will change state with respect to the rising
edge of XCLKOUT. For the case where XCLKOUT = one-half XTIMCLK, some strobes will change state either
on the rising edge of XCLKOUT or the falling edge of XCLKOUT. In the XINTF timing tables, the notation
XCOHL is used to indicate that the parameter is with respect to either case; XCLKOUT rising edge (high) or
XCLKOUT falling edge (low). If the parameter is always with respect to the rising edge of XCLKOUT, the
notation XCOH is used.