参数资料
| 型号： | XRT91L80IB |
| 厂商： | Exar Corporation |
| 文件页数： | 44/46页 |
| 文件大小： | 0K |
| 描述： | IC TXRX SONET/SDH 4BIT 196STBGA |
| 产品变化通告： | XRT91L80IB Obsolescence 6/Sept/2010 |
| 标准包装： | 126 |
| 类型： | 收发器 |
| 规程： | SONET/SDH |
| 电源电压： | 3.3V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 196-LFBGA |
| 供应商设备封装： | 196-STBGA（12x12） |
| 包装： | 托盘 |
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XRT91L80
REV. 1.0.0
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
5
HARDWARE COMMON CONTROL
NAME
LEVEL
TYPE
PIN
DESCRIPTION
RLOOPS
LVTTL,
LVCMOS
I
C10
Serial Remote Loopback
The serial remote loopback mode interconnects the receive
serial data input to the transmit serial data output. If serial
remote loopback is enabled, the 4-bit parallel transmit data
input is ignored while the 4-bit parallel receive data output is
maintained.
"Low" = Disabled
"High" = Serial Remote Loopback Mode Enabled
NOTE: DLOOP and RLOOPS can be enabled simultaneously
to achieve a dual loopback diagnostic feature.
This pin is provided with an internal pull-down.
RLOOPP
LVTTL,
LVCMOS
I
A11
Parallel Remote Loopback
The parallel remote loopback mode allows the serial data input
stream to pass through the clock and data recovery circuit and
looped-back at the parallel interface to the serial output port.
The 4-bit parallel transmit data input is ignored while the 4-bit
parallel receive data output is maintained.
"Low" = Disabled
"High" = Parallel Remote Loopback Mode Enabled
NOTE:
DLOOP and RLOOPS should be disabled when
RLOOPP is enabled. The internal FIFO should also be
flushed using FIFO_RST pin or register bit when
parallel remote loopback is enabled/disabled.
This pin is provided with an internal pull-down.
DLOOP
LVTTL,
LVCMOS
I
B6
Digital Local Loopback
The digital local loopback mode interconnects the 4-bit parallel
transmit data and parallel transmit clock input to the 4-bit paral-
lel receive data and parallel receive clock output respectively
while maintaining the transmit serial data output. If digital local
loopback is enabled, the receive serial data input is ignored.
"Low" = Disabled
"High" = Digital Local Loopback Mode Enabled
NOTE: DLOOP and RLOOPS can be enabled simultaneously
to achieve a dual loopback diagnostic feature.
This pin is provided with an internal pull-down.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT91L80IB-F | 功能描述:总线收发器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| XRT91L81 | 制造商:EXAR 制造商全称:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L81IB | 制造商:EXAR 制造商全称:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82 | 制造商:EXAR 制造商全称:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82ES | 功能描述:总线收发器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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