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参数资料
| 型号： | YF80532KC0412M |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2000 MHz, MICROPROCESSOR, CPGA603 |
| 封装： | MICRO, PGA-603 |
| 文件页数： | 1/129页 |
| 文件大小： | 1528K |
| 代理商： | YF80532KC0412M |
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Intel Xeon Processor MP with up to 2-MB L3
Cache (on the 0.13 Micron Process)
Datasheet
Product Features
The Intel Xeon processor MP with up to 2-MB L3 cache on the 0.13 micron process is
designed for high-performance multi-processor server applications. Based on the Intel
NetBurst microarchitecture and the new Hyper-Threading Technology, it is binary compatible
with previous Intel Architecture (IA-32) processors. The Intel Xeon processor MP with up to 2-
MB L3 cache is scalable to four processors in a multiprocessor system providing exceptional
performance for applications running on advanced operating systems such as Microsoft
Windows* XP and Windows* 2000 operating systems, Linux*, and UNIX*. The Intel Xeon
processor MP with up to 2 MB L3 cache delivers compute power at unparalleled value and
flexibility for internet infrastructure and departmental server applications. The Intel NetBurst
microarchitecture and Hyper-Threading Technology deliver outstanding performance and
headroom for peak internet server workloads, resulting in faster response times, support for
more users, and improved scalability.
I Available at 1.50, 1.90, and 2 GHz
I Multi-processing server support
I Binary compatible with applications
running on previous members of the Intel
IA32 microprocessor line
I Intel
NetBurst microarchitecture
I Hyper-Threading Technology
— Hardware support for multi-threaded
applications
I 400 MHz System bus
— Bandwidth up to 3.2 GB/second
I Rapid Execution Engine: Arithmetic Logic
Units (ALUs) run at twice the processor
core frequency
I Hyper-Pipelined Technology
I Advance Dynamic Execution
— Very deep out-of-order execution
— Enhanced branch prediction
I Level 1 Execution Trace Cache stores 12 K
micro-ops and removes decoder latency
from main execution loops
— Includes 8- KB Level 1 data cache
I 512-KB Advanced Transfer L2 Cache (on-
die, full speed Level 2 cache) with 8-way
associativity and Error Correcting Code
(ECC)
I 1-MB or 2-MB L3 Cache (on-die, full
speed Level 3 cache) with 8-way
associativity and Error Correcting Code
(ECC)
I Enables system support of up to 64 GB of
physical memory
I Streaming SIMD Extensions 2 (SSE2)
— 144 new instructions for double-precision
floating point operations, media/video
streaming, and secure transactions
I Enhanced floating point and multimedia
unit for enhanced video, audio, encryption,
and 3D performance
I Power Management capabilities
— System Management mode
— Multiple low-power states
I Advanced System Management Features
— System Management Bus
— Processor Information ROM (PIROM)
— OEM Scratch EEPROM
— Thermal Monitor
— Machine Check Architecture (MCA)
Document Number: 251931-001
November 2002
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相关代理商/技术参数 |
参数描述 |
|---|---|
| YFA014C049ZA | 制造商:Panasonic Industrial Company 功能描述:CHASSIS |
| YFA054C022ZA | 制造商:Panasonic Industrial Company 功能描述:COVER |
| YFAW025 | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:Pin Header : 2.5mm PITCH |
| YFAW025-02 | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:Pin Header : 2.5mm PITCH |
| YFAW025-03 | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:Pin Header : 2.5mm PITCH |
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