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参数资料
| 型号： | YF80532KC0412M |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2000 MHz, MICROPROCESSOR, CPGA603 |
| 封装： | MICRO, PGA-603 |
| 文件页数： | 118/129页 |
| 文件大小： | 1528K |
| 代理商： | YF80532KC0412M |
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Datasheet
89
Features
be cleared once the SMBus master device first reads the status register then reads the slave ARA
unless the fault condition persists. Reading the Status Register alone or setting the mask bit within
the Configuration Register does not clear the interrupt.
6.4.8
SMBus Device Addressing
Of the addresses broadcast across the SMBus, the memory component claims those of the form
“1010XXXZb”. The “XXX” bits are defined by pullups and pulldowns on the system baseboard.
These address pins are pulled down weakly (10 k
) on the processor substrate to ensure that the
memory components are in a known state in systems which do not support the SMBus, or only
support a partial implementation. The “Z” bit is the read/write bit for the serial bus transaction.
The thermal sensor internally decodes one of three upper address patterns from the bus of the form
“0011XXXZb”, “1001XXXZb”, or “0101XXXZb”. The device’s addressing, as implemented, uses
the SM_TS_A[1:0] pins in either the HI, LO, or Hi-Z state. Therefore, the thermal sensor supports
nine unique addresses. To set either pin for the Hi-Z state, the pin must be left floating. As before,
the “Z” bit is the read/write bit for the serial transaction.
Note that addresses of the form “0000XXXXb” are Reserved and should not be generated by an
SMBus master. The thermal sensor samples and latches the SM_TS_A[1:0] signals at power-up
and at the starting point of every conversion. System designers should ensure that these signals are
at valid VIH, VIL, or floating input levels prior to or while the thermal sensor’s SM_VCC supply
powers up. This should be done by pulling the pins to SM_VCC or VSS via a 1 k
or smaller
resistor, or leaving the pins floating to achieve the Hi-Z state. If the designer desires to drive the
SM_TS_A[1:0] pins with logic, the designer must still ensure that the pins are at valid input levels
prior to or while the SM_VCC supply ramps up. The system designer must also ensure that their
particular implementation does not add excessive capacitance to the address inputs. Excess
capacitance at the address inputs may cause address recognition problems. Refer to the appropriate
platform design guidelines document and the SMBus and I2C Bus Design Guide application note.
describe the address pin connections and how they affect the addressing of the devices.
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| YFAW025 | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:Pin Header : 2.5mm PITCH |
| YFAW025-02 | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:Pin Header : 2.5mm PITCH |
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