参数资料
型号: ADUC7032BSTZ-8V-RL
厂商: Analog Devices Inc
文件页数: 17/128页
文件大小: 0K
描述: IC BATTERY SENSOR PREC 48-LQFP
标准包装: 1
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 20.48MHz
连通性: LIN,SPI,UART/USART
外围设备: POR,PSM,温度传感器,WDT
输入/输出数: 9
程序存储器容量: 96KB(48K x 16)
程序存储器类型: 闪存
RAM 容量: 1.5K x 32
电压 - 电源 (Vcc/Vdd): 3.5 V ~ 18 V
数据转换器: A/D 2x16b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 48-LQFP
包装: 标准包装
其它名称: ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 113 of 128
SPI Control Register :
Name :
SPICON
Address :
0xFFFF0A10
Default Value :
0x0000
Access :
Read/Write
Function :
The 16-bit MMR configures the Serial Peripheral Interface.
Table 79 : SPICON MMR Bit Descriptions
Bit
Description
15-13
Reserved and should be written as zero
12
Continuous transfer enable
Set by user to enable continuous transfer.
In master mode the transfer will continue until no valid data is available in the TX register. SS will be asserted and remain
asserted for the duration of each 8-bit serial transfer until TX is empty
Cleared by user to disable continuous transfer. Each transfer consists of a single 8-bit serial transfer. If valid data exists in
the SPITX register then a new transfer is initiated after a stall period
11
Loop back enable
Set by user to connect MISO to MOSI and test software
Cleared by user to be in normal mode
10
Slave output enable
Set by user to enable the slave output
Cleared by user to disable slave output
9
Slave select input enable
Set by user in master mode to enable the output
8
SPIRX overflow overwrite enable
Set by user, the valid data in the RX register is overwritten by the new serial byte received
Cleared by user, the new serial byte received is discarded
7
SPITX underflow mode
Set by user to transmit the previous data
Cleared by user to transmit 0
6
Transfer and interrupt mode (master mode)
Set by user to initiate transfer with a write to the SPITX register. Interrupt will occur when TX is empty
Cleared by user to initiate transfer with a read of the SPIRX register. Interrupt will occur when RX is full
5
LSB first transfer enable bit
Set by user the LSB is transmitted first
Cleared by user the MSB is transmitted first
4
Reserved and should be written as zero
3
Serial clock polarity mode bit
Set by user, the serial clock idles high
Cleared by user the serial clock idles low
2
Serial clock phase mode bit
Set by user, the serial clock pulses at the beginning of each serial bit transfer
Cleared by user, the serial clock pulses eat end of each serial bit transfer
1
Master mode enable bit
Set by user to enable master mode
Cleared by user to enable slave mode
0
SPI enable bit
Set by user to enable the SPI
Cleared to disable the SPI
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