参数资料
型号: ADUC7032BSTZ-8V-RL
厂商: Analog Devices Inc
文件页数: 7/128页
文件大小: 0K
描述: IC BATTERY SENSOR PREC 48-LQFP
标准包装: 1
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 20.48MHz
连通性: LIN,SPI,UART/USART
外围设备: POR,PSM,温度传感器,WDT
输入/输出数: 9
程序存储器容量: 96KB(48K x 16)
程序存储器类型: 闪存
RAM 容量: 1.5K x 32
电压 - 电源 (Vcc/Vdd): 3.5 V ~ 18 V
数据转换器: A/D 2x16b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 48-LQFP
包装: 标准包装
其它名称: ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 104 of 128
WAKE-UP(WU)
The Wake Up pin is a high voltage GPIO controlled via HVCON and HVDAT.
Wake-Up(WU) Pin Circuit Description
The WU pin is configured by default as an output with an
internal 10K pull-down resistor and high side FET driver. The
WU pin in its default mode of operation is specified to generate
an active high system wake-up request by forcing the external
system WU bus high. User code can assert the WU output by
writing directly to HVCFG0[4].
It should be noted the output will only respond after the
10usecs latency through the (serial communication based) high
voltage interface
05
99
4-
0
37
VDD
INTERNAL
SENSE
RESISTOR
SHORT CIRCUIT
TRIP REFERENCE
SHORT CIRCUIT
PROTECTION
OUTPUT CONTROL
HVMON[0]
NORMAL
HVCFG0[4]
NORMAL
HVMON[7]
400s
GLITCH
IMMUNITY
3V
ENABLE
READ-BACK
HVCFG1[4]
INTERNAL
10k
RESISTOR
R1
6.6k
R2
3.3k
IO_VSS
6k
O/C
DIAGNOSTIC
RESISTOR
EXTERNAL
WU PIN
EXTERNAL
WAKE BUS
CLOAD
91nF
RLOAD
1k
EXTERNAL
CURRENT-LIMIT
RESISTOR
39
HVCFG1[0]
Figure 36 : WU Circuit, Block Diagram
The internal FET is capable of sourcing significant current and
therefore a substantial on-chip self-heating can occur if this
driver is asserted for a long time period. For this reason a
Monoflop, a 1.3 second timeout timer, has been included. By
default the Monoflop is enabled and will disable the Wake
Driver after 1.3 seconds. It is possible to disable the Monoflop
via HVCFG1[1]. If the Wake Monoflop is disabled, then the
Wake driver should be disabled after 1.3s.
The Wake Pin also features a short circuit detection feature.
When the wake Pin sources more than 200mA for 400uS a high
voltage interrupt will be generated with HVMON[0] set.
By Default, a thermal shutdown event disables the Wake
Driver. The Wake driver must be re-enabled manually after a
thermal event via HVCFG1[3]. It is possible to disable the
automatic shutdown during a thermal event via HVCFG0[7].
The WU pin can be configured in I/O mode by writing a 1 to
HVCFG1[4]. In this mode, a rising or falling edge will
immediately generate a high voltage interrupt. HVMON[7]
directly reflects the state of the external WU pin. This
comparator has a trip level of 3VTYP.
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