参数资料
型号: DS2196LN+
厂商: Maxim Integrated Products
文件页数: 126/157页
文件大小: 0K
描述: IC FRAMER DUAL T1 LIU 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
控制器类型: T1 调帧器
接口: 并行/串行
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 85mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 托盘
DS2196
70 of 157
10.
DS0 MONITORING FUNCTION
Each framer in the DS2196 has the ability to monitor one DS0 64 kbps channel in the transmit direction
and one DS0 channel in the receive direction at the same time. In the transmit direction the user will
determine which channel is to be monitored by properly setting the TCM0 to TCM4 bits in the CCR5A &
CCR5B registers. In the receive direction, the RCM0 to RCM4 bits in the CCR6A & CCR6B registers
need to be properly set. The DS0 channel pointed to by the TCM0 to TCM4 bits will appear in the
Transmit DS0 Monitor (TDS0M) register and the DS0 channel pointed to by the RCM0 to RCM4 bits
will appear in the Receive DS0 (RDS0M) register. The TCM4 to TCM0 and RCM4 to RCM0 bits should
be programmed with the decimal decode of the appropriate T1 channel. Channels 1 through 24 map to
register values 0 through 23. For example, if DS0 channel 6 in the transmit direction and DS0 channel 15
in the receive direction needed to be monitored, then the following values would be programmed into
CCR5 and CCR6:
TCM4 = 0
RCM4 = 0
TCM3 = 0
RCM3 = 1
TCM2 = 1
RCM2 = 1
TCM1 = 0
RCM1 = 1
TCM0 = 1
RCM0 = 0
CCR5A: COMMON CONTROL REGISTER 5 FRAMER A (Address = 19 Hex)
CCR5B: COMMON CONTROL REGISTER 5 FRAMER B (Address = B9 Hex)
[Repeated here from section 6 for convenience with only the TX monitor function present]
(MSB)
(LSB)
TCM4
TCM3
TCM2
TCM1
TCM0
SYMBOL
POSITION
NAME AND DESCRIPTION
TCM4
CCR5.4
Transmit Channel Monitor Bit 4. MSB of a channel decode
that determines which transmit channel data will appear in the
TDS0M register.
TCM3
CCR5.3
Transmit Channel Monitor Bit 3.
TCM2
CCR5.2
Transmit Channel Monitor Bit 2.
TCM1
CCR5.1
Transmit Channel Monitor Bit 1.
TCM0
CCR5.0
Transmit Channel Monitor Bit 0. LSB of the channel
decode.
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