参数资料
型号: DS2196LN+
厂商: Maxim Integrated Products
文件页数: 69/157页
文件大小: 0K
描述: IC FRAMER DUAL T1 LIU 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
控制器类型: T1 调帧器
接口: 并行/串行
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 85mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 托盘
DS2196
19 of 157
Signal Name:
PNRZ
Signal Description:
Protect NRZ Data
Signal Type:
Input
This digital input is used to pass a NRZ data stream via the Data Source Selection MUX and the jitter attenuator
block to the RPOSLO and RNEGLO output pins. Data input to this pin is sampled on the falling or rising edge of
PCLK.
Signal Name:
PCLK
Signal Description:
Protect Clock
Signal Type:
Input
This digital input is used to pass a 1.544 MHz clock via the Data Source Selection MUX and the jitter attenuator
block to the RCLKLO output pin.
Signal Name:
RCL
Signal Description:
Receive Carrier Loss
Signal Type:
Output
Set high when the line interface (LIU) detects a carrier loss.
Signal Name:
RPOSLO
Signal Description:
Receive Positive Data Output from the LIU
Signal Type:
Output
Updated on the rising edge of RCLKLO with either bipolar data out of the LIU or NRZ data from the WNRZ or
PNRZ inputs.
Signal Name:
RNEGLO
Signal Description:
Receive Negative Data Output from the LIU
Signal Type:
Output
Updated on the rising edge of RCLKLO with either bipolar data out of the LIU or NRZ data from the WNRZ or
PNRZ inputs.
Signal Name:
RCLKO
Signal Description:
Receive Clock Output
Signal Type:
Output
Either a buffered recovered clock from the T1 line or the clock provided at the WCLK or PCLK inputs.
Signal Name:
WPS
Signal Description:
Working or Protect Select
Signal Type:
Input
This digital input can be used to select between the WNRZ/WCLK (working) or PNRZ/PCLK (protect) data
inputs. For this pin to be active the Data Source MUX must be properly configured via the CCR1A.2, CCR1A.3,
and CCR1A.4 control bits.
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