收藏本站
参数资料
型号： DSPB56362AG120
厂商： Freescale Semiconductor
文件页数： 72/152页
文件大小： 0K
描述： IC DSP 24BIT AUD 120MHZ 144-LQFP
标准包装： 60
系列： DSP56K/Symphony
类型： 音频处理器
接口： 主机接口，I²C，SAI，SPI
时钟速率： 120MHz
非易失内存： ROM（126 kB）
芯片上RAM： 42kB
电压 - 输入/输出： 3.30V
电压 - 核心： 3.30V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 144-LQFP
供应商设备封装： 144-LQFP（20x20）
包装： 托盘
JTAG/OnCE Interface
DSP56362 Technical Data, Rev. 4
2-20
Freescale Semiconductor
2.12
JTAG/OnCE Interface
Table 2-14 JTAG/OnCE Interface
Signal
Name
Type
State During Reset
Signal Description
TCK
Input
Test Clock—TCK is a test clock input signal used to synchronize the JTAG
test logic. It has an internal pull-up resistor.
This input is 5 V tolerant.
TDI
Input
Test Data Input—TDI is a test data serial input signal used for test
instructions and data. TDI is sampled on the rising edge of TCK and has an
internal pull-up resistor.
This input is 5 V tolerant.
TDO
Output
Tri-Stated
Test Data Output—TDO is a test data serial output signal used for test
instructions and data. TDO can be tri-stated and is actively driven in the
shift-IR and shift-DR controller states. TDO changes on the falling edge of
TCK.
TMS
Input
Test Mode Select—TMS is an input signal used to sequence the test
controller’s state machine. TMS is sampled on the rising edge of TCK and
has an internal pull-up resistor.
This input is 5 V tolerant.
TRST
Input
Test Reset—TRST is an active-low Schmitt-trigger input signal used to
asynchronously initialize the test controller. TRST has an internal pull-up
resistor.
The use of TRST is not recommended for new designs. It is recommended
to leave TRST disconnected.
This input is 5 V tolerant.
DE
Input/Output
Input
Debug Event—DE is an open-drain, bidirectional, active-low signal
providing, as an input, a means of entering the debug mode of operation
from an external command controller, and, as an output, a means of
acknowledging that the chip has entered the debug mode. This signal, when
asserted as an input, causes the DSP56300 core to finish the current
instruction being executed, save the instruction pipeline information, enter
the debug mode, and wait for commands to be entered from the debug serial
input line. This signal is asserted as an output for three clock cycles when
the chip enters the debug mode as a result of a debug request or as a result
of meeting a breakpoint condition. The DE has an internal pull-up resistor.
This is not a standard part of the JTAG TAP controller. The signal connects
directly to the OnCE module to initiate debug mode directly or to provide a
direct external indication that the chip has entered the debug mode. All other
interface with the OnCE module must occur through the JTAG port.
The use of DE is not recommended for new designs. It is recommended to
leave DE disconnected.
This input is not 5 V tolerant.
相关PDF资料
PDF描述
DSPB56364AF100 IC DSP 24BIT AUD 100MHZ 100-LQFP
DSPB56366AG120 IC DSP 24BIT AUD 120MHZ 144-LQFP
DSPB56367AG150 IC DSP 24BIT 150MHZ 144-LQFP
DSPB56371AF180 IC DSP 24BIT 180MHZ 80-LQFP
DSPB56374AEC IC DSP 24BIT 150MHZ 52-LQFP
相关代理商/技术参数
参数描述
DSPB56362AG120 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSPB56362PV100 制造商:Rochester Electronics LLC 功能描述:DIGITAL AUDIO DSP - Bulk
DSPB56362PV120 制造商:Rochester Electronics LLC 功能描述:DIGITAL AUDIO DSP - Bulk
DSPB56364AF100 功能描述:数字信号处理器和控制器 - DSP, DSC DSP56364 RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPB56364FU100 制造商:Rochester Electronics LLC 功能描述:24 BIT AUDIO DSP - Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*