
GT-48001A Switched Ethernet Controller
2
Revision 1.6
Contents
1. Functional Overview ...........................................................................................................6
1.1
The GalNet Switching Architecture .......................................................................................................... 6
1.2
Ethernet Ports .......................................................................................................................................... 6
1.3
Address Recognition ................................................................................................................................ 7
1.4
CPU Packet Routing ................................................................................................................................ 7
1.5
Intervention Mode ..................................................................................................................................... 7
1.6
Network Management Features ............................................................................................................... 7
1.7
DRAM Interface ........................................................................................................................................ 7
1.8
PCI Interface ............................................................................................................................................ 7
2. Pin Information .................................................................................................................... 8
2.1
Logic Symbol ............................................................................................................................................ 8
2.2
Pin Functions and Assignment ................................................................................................................ 9
3. Operational Overview ....................................................................................................... 13
3.1
Enabling/Disabling the GT-48001A ........................................................................................................ 13
3.2
Basic Operation ...................................................................................................................................... 13
3.3
Address Learning ................................................................................................................................... 14
3.4
Packet Buffering ..................................................................................................................................... 14
3.5
Packet Forwarding ................................................................................................................................. 14
3.6
The GalNet Protocol ............................................................................................................................... 14
3.7
Terminology ............................................................................................................................................ 14
4. MAC Address Learning Process...................................................................................... 16
4.1
Address Recognition .............................................................................................................................. 16
4.2
Recovery Process .................................................................................................................................. 16
4.3
Address Aging ........................................................................................................................................ 17
4.4
Static Addresses .................................................................................................................................... 17
4.5
Address Recognition Failure .................................................................................................................. 17
5. GT-48001A Buffers and Queues ...................................................................................... 18
5.1
Receive Buffer Threshold Programming ................................................................................................ 19
6. Packet Forwarding ............................................................................................................ 20
6.1
Forwarding a Unicast Packet to a Local Port ......................................................................................... 20
6.2
Forwarding a Unicast Packet to a Port in a Different GalNet Device ..................................................... 20
6.3
Forwarding a Multicast Packet ............................................................................................................... 21
6.3.1
Local Ports .............................................................................................................................. 21
6.3.2
Between GalNet Devices ........................................................................................................ 21
6.3.2.1
CPU Disabled ......................................................................................................... 21
6.3.2.2
CPU Enabled .......................................................................................................... 21
6.4
Forwarding a Packet to the CPU Directly ............................................................................................... 22
6.5
Forwarding a Packet from the CPU to a GalNet Device ........................................................................ 24
6.6
CRC Generation ..................................................................................................................................... 25
6.7
Tx Watchdog Timer ................................................................................................................................ 25
7. Device Table Operation .................................................................................................... 26
7.1
Automatic Device Table Initialization ...................................................................................................... 26
7.2
Manual Device Table Initialization .......................................................................................................... 26
7.3
Programming Device Numbers .............................................................................................................. 26