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参数资料
| 型号： | GT-48001A |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Ethernet Controller For 10BaseX(10BaseX交换式快速以太网控制器) |
| 中文描述： | 交换式以太网控制器10BaseX（10BaseX交换式快速以太网控制器） |
| 文件页数： | 5/101页 |
| 文件大小： | 1235K |
| 代理商： | GT-48001A |
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GT-48001A Switched Ethernet Controller
Revision 1.6
11
RxLP/Coll[7:0]
I
Receive Link Pulses/Collision: This multiplexed pin carries the Receive Link
Pulses in 10Base-T.
In AUI mode, it indicates Collision.
Pol[7:1]/
AUILinkUp[7:1]
I/O
Polarity/AUI Link Status: Indicates the line polarity of Ports 7:1 in 10Base-T
mode (output).
In AUI mode, The AUILinkUp[7:1] pins of the GT-48001A are used as inputs to
indicate the link status which can be driven by the PHY. When the respective
AUILinkUp[7:1] pin is a ‘1’, the port has established link. When the respective
AUILinkUp[7:1] pin is a ‘0’, the link has failed on that port.
Pol[0]/AUILinkUp[0]/
SynClk10
I/O
Polarity/AUI Link Status/Synchronous Clock 10: Indicates the polarity of
Port 0 in 10Base-T mode (output).
In AUI mode, The AUILinkUp[0] pin of the GT-48001A are used as an input to
indicate the link status which can be driven by the PHY. When AUILinkUp[0]
pin is a ‘1’, port 0 has established link. When AUILinkUp[0] pin is a ‘0’, the link
has failed on port 0.
In Synchronous mode, this input pin carries the 10MHz synchronous clock.
SClk/SynClk20
I
80MHz Serial Clock/Synchronous Clock 20: Used to recover the receive
clock and to generate the the internal transmit clocks.
In Synchronous mode, this pin carries the 20MHz synchronous clock.
Miscellaneous Interface Pins
LEDData
O
LED Data: LED indicators (Link Status, Receive, Transmit, Collision,
Unknown, Port Sniffer, and Half/Full Duplex) of each port. The data is shifted
out in 128 bit long frames using the LEDClk and LEDStb pins.
LEDStb
O
LED Strobe: Indicates the beginning of valid data frame on the LEDData pin.
LEDClk
O
LED Clock: LEDClk frequency is 1 MHz. During Rst* assertion, LEDClk fre-
quency is 10 MHz. This pin is used to clock the serial data out.
LEDMode
I
LED Mode: When the LEDMode pin is LOW, the LED mode is compatible with
the GT-48001. When HIGH, the GT-48001A enters LED Mode 1. See the LED
interface section for a detailed description.
RstQueue*
I
Reset Transmit Queues: When asserted, all internal transmit and receive
queues are cleared. All GT-48001A state machines are moved to their initial
state.
EnDev*
I
Enable Device: Enables serial and PCI ports. When asserted LOW, all serial
ports and the PCI port are active. When deasserted, the ports and the PCI are
disabled (see Section 3.1).
Sy m b ol
Ty p e
De s c ri pti o n
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