参数资料
| 型号： | IP-VITERBI/SS |
| 厂商： | Altera |
| 文件页数： | 11/50页 |
| 文件大小： | 0K |
| 描述： | IP VITERBI LOW-SPEED |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Viterbi 低速编译器 |
| 许可证： | 初始许可证 |
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Chapter 1: About This Compiler
Installation and Licensing
Table 1–7. Performance & Area Utilization for Parallel Architecture—Stratix III Devices (Part 2 of 2)
1–7
softbits
3
5
7
7
7
3
5
7
L
3
3
1
3
4
3
3
3
Parameters
Optimization
None
None
None
None
None
None
None
None
Best State
Finder
Off
Off
Off
Off
Off
On
On
On
Combinational
ALUTs
548
918
2,013
2,401
2,596
565
1,092
3,082
Logic
Registers
437
574
970
1,109
1,180
464
723
1,732
Memory
Blocks
(M9K)
5
5
7
7
7
5
5
7
fMAX
(MHz)
327
307
292
285
285
326
308
277
Throughput
(Mbps)
327
307
292
285
285
326
308
277
Table 1–8. Performance & Area Utilization for Parallel Architecture—Stratix IV Devices
Parameters
Memory
Combinational
Logic
fMAX
Throughput
softbits
7
7
3
5
7
7
7
3
5
7
L
3
2
3
3
1
3
4
3
3
3
Optimization
Block
Continuous
None
None
None
None
None
None
None
None
Best State
Finder
Off
Off
Off
Off
Off
Off
Off
On
On
On
ALUTs
2,058
2,015
606
942
2,044
2,436
754
624
1,115
3,117
Registers
847
815
523
608
1,012
1,153
545
551
756
1,777
ALUTs
--
--
40
16
24
24
6
40
16
24
M9K
5
9
2
4
6
6
5
2
4
6
(MHz)
285
292
345
316
292
289
311
341
314
288
(Mbps)
285
292
345
316
292
289
311
341
314
288
Installation and Licensing
the Quartus ? II software and can be downloaded from the Altera ? website,
www.altera.com .
f For system requirements and installation instructions, refer to the Altera Software
Installation and Licensing manual.
November 2013
Altera Corporation
Viterbi Compiler
User Guide
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