参数资料
| 型号： | IP-VITERBI/SS |
| 厂商： | Altera |
| 文件页数： | 27/50页 |
| 文件大小： | 0K |
| 描述： | IP VITERBI LOW-SPEED |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Viterbi 低速编译器 |
| 许可证： | 初始许可证 |
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3. Functional Description
The Viterbi decoder can decode continuous streams and block streams. It normally
operates in continuous mode.
In continuous mode, the decoder waits until it has processed a number of symbols
greater than the traceback length. When the decoder has traced back the number of
bits indicated in the traceback length, it starts delivering output bits. This behavior is
repeated as long as it remains in continuous mode but changes when the end of
packet (EOP) signal is asserted. The decoder then switches to block mode, starting
traceback from the last symbol or state. The tr_init_state signal indicates the end
state that starts the traceback operation. For block decoding it is recommended to
indicate the end state of the tail bits (usually zero) and set the tb_type port to 1.
Soft Symbol Inputs
The number of soft decision bits per symbol, softbits , represent 2 softbits – 1 soft 0s and
2 softbits – 1 soft 1s. The input values represent received signal amplitudes. If the input is
in log-likelihood format, a transformation is required and you must use extra softbits
to retain signal integrity. Depunctured values are separately marked. The decoder
allows a hard-decision input when softbits = 1.
Table 3–1 shows an example of the soft symbol input representation, when
softbits = 3.
Table 3–1. Soft Symbol Input Representation
Soft Symbol
011
010
001
000
111
110
101
100
Strongest '0'
Strong '0'
Weak '0'
Weakest '0'
Weakest '1'
Weak '1'
Strong '1'
Strongest '1'
Meaning
November 2013
Altera Corporation
Viterbi Compiler
User Guide
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