参数资料
型号: IP-VITERBI/SS
厂商: Altera
文件页数: 15/50页
文件大小: 0K
描述: IP VITERBI LOW-SPEED
标准包装: 1
系列: *
类型: MegaCore
功能: Viterbi 低速编译器
许可证: 初始许可证
2. Getting Started
Design Flow
The Viterbi Compiler supports the following design flows:
DSP Builder : Use this flow if you want to create a DSP Builder model that
includes a Viterbi Compiler variation.
MegaWizard? Plug-In Manager : Use this flow if you would like to create a
Viterbi Compiler variation that you can instantiate manually in your design.
This chapter describes how you can use a Viterbi Compiler variation in either of these
flows. The parameterization provides the same options in each flow and is described
in “Parameterize the MegaCore Function” on page 2–3 .
After parameterizing and simulating a design in either of these flows, you can
compile the completed design in the Quartus II software.
DSP Builder Flow
Altera’s DSP Builder product shortens digital signal processing (DSP) design cycles
by helping you create the hardware representation of a DSP design in an
algorithm-friendly development environment.
DSP Builder integrates the algorithm development, simulation, and verification
capabilities of The MathWorks MATLAB ? and Simulink ? system-level design tools
with Altera Quartus ? II software and third-party synthesis and simulation tools. You
can combine existing Simulink blocks with Altera DSP Builder blocks and MegaCore
function variation blocks to verify system level specifications and perform simulation.
In DSP Builder, a Simulink symbol for the MegaCore function appears in the
MegaCore Functions library of the Altera DSP Builder Blockset in the Simulink library
browser.
To use the Viterbi Compiler in the MATLAB/Simulink environment, follow these
steps:
1. Create a new Simulink model.
2. Select the viterbi_ < version > block from the MegaCore Functions library in the
Simulink Library Browser, add it to your model, and give the block a unique
name.
3. Double-click on the viterbi_ < version > block in your model to display the
parameter editor and parameterize the MegaCore function variation. For an
example of setting parameters for the Viterbi Compiler, refer to “Parameterize the
MegaCore Function” on page 2–3 .
4. Click Finish in the parameter editor to complete the parameterization and
generate your Viterbi Compiler MegaCore function variation. For information
about the generated files, refer to Table 2–1 on page 2–11 .
5. Connect your Viterbi Compiler variation to the other blocks in your model.
November 2013
Altera Corporation
Viterbi Compiler
User Guide
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