参数资料
| 型号： | IP-VITERBI/SS |
| 厂商： | Altera |
| 文件页数： | 39/50页 |
| 文件大小： | 0K |
| 描述： | IP VITERBI LOW-SPEED |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Viterbi 低速编译器 |
| 许可证： | 初始许可证 |
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Chapter 3: Functional Description
3–13
Parameters
For multiple code sets, the first code definition corresponds to the first line and is
selected with sel_code input = 0; the second line is selected with sel_code = 1; the
third with sel_code = 2 and so on. For each code definition you can select N , the
polynomials, the constraint length L , and the mode (Viterbi or TCM). You can mix
different constraint lengths with different TCM and Viterbi modes. The test data,
which IP Toolbench creates, tests each of the code definitions. You can see these tests
in the simulation with the testbench or if you look at the block_period_stim.txt file.
1
1
In hybrid mode, for constraint lengths of 3 and 4, the bitwidth of tr_init_state is 4,
but the MegaCore function ignores the redundant higher bits.
For multiple constraint lengths, some of the last decoded bits may be incorrect, as a
result of the Viterbi algorithm. To avoid this effect, give a lower BER, and reduce the
probability of being on the wrong trellis path, set Optimization to None and turn on
Best State Finder .
Parameters Tab
Table 3–5 shows the options that can be set in the Parameters tab.
Table 3–5. Parameters Tab Options
Parameter
Maximum Constraint
length ( L MAX )
ACS Units ( A )
Traceback ( v )
Softbits ( softbits )
Bmgwide
Value
5 to 9 (hybrid)
3 to 9 (parallel)
1, 2, 4, 8, or 16
8 (minimum)
1 to 16
–
Description
The maximum constraint length L MAX . (Refer also to “Code Sets Tab” on
page 3–12 . )
The number of ACS units, which adds a degree of parallelism (hybrid
architecture only). The range of values available depends upon the value of
maximum constraint length L MAX .
The traceback length, which is the number of stages in the trellis that are
traced back to obtain a decoded bit. It is typically set to 6 × L for
unpunctured codes, and up to 15 × L for highly punctured codes.
Inputs” on page 3–1 .)
The precision of the state metric accumulation. (Refer to “State Metrics” on
page 3–2 ) IP Toolbench selects and displays the optimum value, which
depends on N MAX , L MAX and, softbits .
Throughput Calculator
The throughput calculator uses the following formulae:
Hybrid throughput = f MAX / Z
where:
Z = 10, if log 2 C = 3
Z = 2 log2C , if log 2 C > 3
log 2 C = L MAX – 2 – log 2 A
L MAX is the maximum constraint length
A is ACS units
Parallel throughput = f MAX
November 2013
Altera Corporation
Viterbi Compiler
User Guide
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