- 您现在的位置：买卖IC网 > PDF目录16078 > IPR-SDRAM/DDR (Altera)IP DDR SDRAM CONTROLLER RENEW PDF资料下载
参数资料
| 型号： | IPR-SDRAM/DDR |
| 厂商： | Altera |
| 文件页数： | 14/106页 |
| 文件大小： | 0K |
| 描述： | IP DDR SDRAM CONTROLLER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | DDR SDRAM 控制器 |
| 许可证： | 续用许可证 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页
2–4
1
Chapter 2: Getting Started
SOPC Builder Design Flow
If you are targeting a specific Altera development board, ensure you choose
the correct target device and memory type.
9. Choose the target device in the Available devices list.
10. The remaining pages in the New Project Wizard are optional. Click Finish to
complete the Quartus II project.
Launch SOPC Builder & IP Toolbench
To launch SOPC Builder, follow these steps:
1. Choose SOPC Builder (Tools menu).
2. Enter a System Name .
1
The system name must not be the same as the Quartus II project name (and
therefore the top-level design entity name).
3. Type a value for the clk_0 (MHz) . For example, 80.0 .
4. Build your system from the System Contents list. Expand the Memories and
Memory Controllers folder, and click either DDR SDRAM MegaCore Function
or DDR2 SDRAM MegaCore Function in the SDRAM folder. Click Add . The
DDR SDRAM controller IP Toolbench opens.
Parameterize
To parameterize the DDR or DDR2 SDRAM Controller, follow these steps:
1. Click Step 1: Parameterize , to parameterize your custom variation.
2. In the Presets list, click a specific memory device, Altera development board, or
click Custom .
1
1
If you chose to target an Altera board, all the settings on the Basic Settings
tab and all Advanced Mode settings are correct for that board.
You cannot alter the clock speed in IP Toolbench. To alter the clock speed of
3. If you chose Custom , choose the appropriate Memory Interface values and enter
your Board Trace Delays .
1
You must accurately set the board trace delays for your system to work in
hardware.
4. Click Show Timing Estimates , at any time to see the results of the system timing
analysis.
5. You may turn on Advanced Mode at any time, to see all the settings you can
change on the DDR or DDR2 SDRAM Controller.
f
For more information on Advanced Mode settings, refer to “Parameterize” on
? March 2009 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| GEC49DRYH | CONN EDGECARD 98POS DIP .100 SLD |
| GCC25DRXS | CONN EDGECARD 50POS DIP .100 SLD |
| IPR-RSENC | IP REED-SOLOMON ENCODER RENEW |
| EBC43DRTS | CONN EDGECARD 86POS DIP .100 SLD |
| ECC36DCAI | CONN EDGECARD 72POS R/A .100 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IP-RSENC | 功能描述:开发软件 Reed-Solomon Encoder MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SLITE2 | 功能描述:开发软件 SerialLite II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
发布紧急采购，3分钟左右您将得到回复。