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参数资料
| 型号： | K4T56163QI-ZLD50 |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 SYNCHRONOUS DRAM, 0.5 ns, PBGA84 |
| 封装： | ROHS COMPLIANT, FBGA-84 |
| 文件页数： | 35/42页 |
| 文件大小： | 727K |
| 代理商： | K4T56163QI-ZLD50 |
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Rev. 1.0 October 2007
DDR2 SDRAM
K4T56163QI
40 of 42
Definitions :
- tCK(avg)
tCK(avg) is calculated as the average clock period across any consecutive 200 cycle window.
- tCH(avg) and tCL(avg)
tCH(avg) is defined as the average HIGH pulse width, as calculated across any consecutive 200 HIGH pulses.
tCL(avg) is defined as the average LOW pulse width, as calculated across any consecutive 200 LOW pulses.
- tJIT(duty)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH from tCH(avg). tCL jitter is the larg-
est deviation of any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)}
where,
tJIT(CH) = {tCHi- tCH(avg) where i=1 to 200}
tJIT(CL) = {tCLi- tCL(avg) where i=1 to 200}
- tJIT(per), tJIT(per,lck)
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).
tJIT(per) = Min/max of {tCKi- tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing.
- tJIT(cc), tJIT(cc,lck)
tJIT(cc) is defined as the difference in clock period between two consecutive clock cycles : tJIT(cc) = Max of |tCKi+1 - tCKi|
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing.
- tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR (6-10per) and tERR (11-50per)
tERR is defined as the cumulative error across multiple consecutive cycles from tCK(avg).
tERR(nper) =
where
n = 2
i + n - 1
tCKj
j = 1
- n x tCK(avg)
∑
for
tERR(2per)
n = 3
for
tERR(3per)
n = 4
for
tERR(4per)
n = 5
for
tERR(5per)
6
≤ n ≤ 10
for
tERR(6-10per)
11
≤ n ≤ 50
for
tERR(11-50per)
tCK(avg) =
where
N = 200
N
tCKj
j = 1
/N
∑
tCH(avg) =
where
N = 200
N
tCHj
j = 1
/(N x tCK(avg))
∑
tCL(avg) =
where
N = 200
N
tCLj
j = 1
/(N x tCK(avg))
∑
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相关代理商/技术参数 |
参数描述 |
|---|---|
| K4T56163QN | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:Consumer Memory |
| K4T56163QN-HCE6000 | 制造商:Samsung SDI 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin FBGA Tray |
| K4T56163QN-HCE6T00 | 制造商:Samsung SDI 功能描述: |
| K4T56163QN-ZCE6T00 | 制造商:Samsung 功能描述:256 SDRAM X16 - Tape and Reel |
| K4T56163QN-ZCE7000 | 制造商:Samsung 功能描述:DDR2 SDRAM 32MX16 47H32M16 PBF FBGA 1.8V PLASTIC 512M - Trays |
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