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参数资料
| 型号： | MT46V32M8P-75ELIT:G |
| 元件分类： | DRAM |
| 英文描述： | 64M X 8 DDR DRAM, 0.75 ns, PDSO66 |
| 封装： | 0.40 INCH, LEAD FREE,PLASTIC, TSOP-66 |
| 文件页数： | 49/93页 |
| 文件大小： | 3632K |
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PDF: 09005aef80768abb/Source: 09005aef82a95a3a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
51
2003 Micron Technology, Inc. All rights reserved.
256Mb: x4, x8, x16 DDR SDRAM
Commands
PRECHARGE (PRE)
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks as shown in Figure 20. The value on the BA0, BA1 inputs selects
the bank, and the A10 input selects whether a single bank is precharged or whether all
banks are precharged.
Figure 20:
PRECHARGE Command
Notes:
1. If A10 is HIGH, bank address becomes “Don’t Care.”
BURST TERMINATE (BST)
The BURST TERMINATE command is used to truncate READ bursts (with auto
precharge disabled). The most recently registered READ command prior to the BURST
TERMINATE command will be truncated, as shown in “Operations” on page 52. The
open page from which the READ burst was terminated remains open.
AUTO REFRESH (AR)
AUTO REFRESH is used during normal operation of the DDR SDRAM and is analogous
to CAS#-before-RAS# (CBR) refresh in FPM/EDO DRAMs. This command is nonpersis-
tent, so it must be issued each time a refresh is required. All banks must be idle before an
AUTO REFRESH command is issued.
SELF REFRESH
The SELF REFRESH command can be used to retain data in the DDR SDRAM, even if the
rest of the system is powered down. The SELF REFRESH command is initiated like an
AUTO REFRESH command except CKE is disabled (LOW).
Self refresh is not supported on automotive temperature (AT) devices.
CS#
WE#
CAS#
RAS#
CKE
A10
BA0, BA1
HIGH
Address
CK
CK#
Don’t Care
Bank1
All banks
One bank
相关PDF资料 |
PDF描述 |
|---|---|
| MT47H128M4CC-3:B | 128M X 4 DDR DRAM, 0.45 ns, PBGA84 |
| MT47H32M16HR-37EAT:G | 32M X 16 DDR DRAM, 0.5 ns, PBGA84 |
| MT47H64M16BT-3ELIT:A | 64M X 16 DDR DRAM, 0.45 ns, PBGA92 |
| MT47H64M8B6-3ELAT:D | DDR DRAM, PBGA60 |
| MT48H32M16LFCJ-8 | 32M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MT46V32M8T66ADC1 | 制造商:Micron Technology Inc 功能描述:32MX8 DDR SDRAM DIE-COM COMMERCIAL 2.5V - Trays |
| MT46V32M8TG-5B/G | 制造商:Micron Technology Inc 功能描述:DRAM Chip DDR SDRAM 256M-Bit 32Mx8 2.6V 66-Pin TSOP Tray |
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