参数资料
型号: NOIH2SM1000S-HHC
厂商: ON Semiconductor
文件页数: 63/67页
文件大小: 0K
描述: IC SPACE IMAGE SENSOR 84-JLCC
标准包装: 1
系列: HAS2
象素大小: 18µm x 18µm
有源象素阵列: 1024H x 1024V
电源电压: 3.3V
类型: CMOS 成像
封装/外壳: *
供应商设备封装: *
包装: *
其它名称: CYIH1SM1000AA-HHCS
CYIH1SM1000AA-HHCS-ND
NOIH2SM1000A
t 11 ?
BLANK?
t 5
t 6
PRECHARGE?
t 7
t 10 ?
SEL?
RESET?
YRST_YRDn?
t 1 ?
t 2 ?
t 2 ?
t 3 ?
t 1 ?
t 4
t 8
S?
t 9
R?
CAL?
t 12
t 12 ?
Reset of line YRD
Readout of line YRD black or signal levels
Pixel readout
Question:
What is your recommendation to do with the unused
analog inputs to the multiplexor (A_IN1-4)? Grounding
them will place them at 0 volts, which is outside the
VLOW_ADC range. Should they be left floating? Or should
they be tied to some constant voltage source between
VHIGH_ADC and VLOW_ADC?
Answer:
If you do not use the analog inputs, then ground them. But
most customers use these inputs to monitor some supply
voltages. For example, monitor your 3.3 V input voltage.
Divide it with a resistance divider to have the voltage inside
the ADC range. You can also use it to monitor some external
voltages that are used on your board and which are important
to be stable.
Question:
What are the implications of turning off the analog power
supplies (VDDA), but keeping the digital power supply
(VDD) active? I am trying to improve the standby low power
mode.
Answer:
No this is not bad. In fact, the total power supply current
will reduce a little more.
Question:
Specification sheet describes the ADC input range
setting: 90 W from GND_ADC_ANA to VLOW_ADC,
130 W from VLOW_ADC to VHIGH_ADC, 130 W from
VHIGH_ADC to VDD_ADC_ANA. The
VDD_ADC_ANA is 3.3 V so this puts VLOW_ADC = 0.85
V and VHIGH_ADC = 2.07 V. Table 28 on page 24 specifies
ADC_VLOW = 0.8 V and ADC_VHIGH = 2.5 V. Which
way do you recommend? Can you describe the discrepancy?
Answer:
The correct ADC range is with the resistance divider. An
alternative without resistance divider is to directly inject this
voltage by a power supply circuitry. This is how it is done in
our characterization system. This way, you can tune ADC
settings as required. However, to retain the resistances, use
the values described above.
Table 28 on page 24 is a typo. It should be 0.85 V and
2.0 V.
Question:
In the data sheet, ADC High/Low bias voltages are
recommended to be set with a resistive divider. But the data
sheet does not mention anything about temperature stability.
For the STAR-1000, there is an internal resistor between
ADC_HIGH and ADC_LOW that had temperature
dependence. Because of this, for STAR-1000 designs, I set
my ADC bias voltages with buffers that keep the bias levels
constant over temperature. Do I need to repeat the same
principle for the HAS2? Or does the HAS2 remove any
temperature dependence for the ADC bias voltages?
Answer:
For good temperature stability, it is better to use the same
principle as the STAR-1000. So use external buffers to keep
ADC_HIGH and ADC_LOW to a fixed voltage level.
Question:
For Figure 41 on page 51 , the table lists t5, output delay,
as typically 10 ns. The STAR-1000 had a troublesome
output delay variability of 20 ns to 60 ns, some parts even
had 70 ns! Have the digital output drivers been significantly
improved for the HAS2 ADC? What are typical rise/fall
times for the outputs?
Answer:
The output delay and stability has been improved
compared to STAR-1000.
Question:
What are the differences between BLANK, CAL, and
PRECHARGE? The STAR-1000 only had a CAL signal.
Answer:
The extra BLANK signal is used to reset the internal
CLKX divider. PRECHARGE is used to pre-charge the
column lines and column caps to ground
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