Lattice Semiconductor
189
Data Sheet
November 2006
ORCA Series 3C and 3T FPGAs
ψ
ψJC
This JEDEC designated parameter correlates the junction temperature to the case temperature. It is generally
used to infer the junction temperature while the device is operating in the system. It is not considered a true ther-
mal resistance, and it is dened by:
where TC is the case temperature at top dead center, TJ is the junction temperature, and Q is the chip power. Dur-
ing the
ΘJA measurements described above, besides the other parameters measured, an additional temperature
reading, TC, is made with a thermocouple attached at top-dead-center of the case.
ψJC is also expressed in units of
°C/watt.
Θ
ΘJC
This is the thermal resistance from junction to case. It is most often used when attaching a heat sink to the top of
the package. It is dened by:
The parameters in this equation have been dened above. However, the measurements are performed with the
case of the part pressed against a water-cooled heat sink so as to draw most of the heat generated by the chip out
the top of the package. It is this difference in the measurement process that differentiates
ΘJC from ψJC. ΘJC is a
true thermal resistance and is expressed in units of °C/watt.
ΘJB
This is the thermal resistance from junction to board (a.k.a.
ΘJL). It is dened by:
where TB is the temperature of the board adjacent to a lead measured with a thermocouple. The other parameters
on the right-hand side have been dened above. This is considered a true thermal resistance, and the measure-
ment is made with a water-cooled heat sink pressed against the board so as to draw most of the heat out of the
leads. Note that
ΘJB is expressed in units of °C/watt, and that this parameter and the way it is measured is still in
JEDEC committee.
ψJC
TJ
TC
–
Q
--------------------
=
ΘJC
TJ
TC
–
Q
--------------------
=
ΘJB
TJ
TB
–
Q
--------------------
=
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.