
OctalLIU
TM
PEF 22508 E
Pin Descriptions
Data Sheet
24
Rev. 1.0, 2005-06-02
C7
XL3.1
I (analog) –
Transmit Line 3, port 1
Analog transmit input 1.
C6
XL4.1
I (analog) –
Transmit Line 4, port 1
Analog transmit input 2.
D4
XL1.2
O
(analog)
–
Transmit Line 1, port 2
Analog output to the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
XOID2
O
–
Transmit Optical Interface Data, port 2
Data in CMI code is shifted out with 50% or 100% duty
cycle on both transitions of XCLK2 according to the CMI
coding. Output polarity is selected by bit LIM0.XDOS
(after reset: data is sent active high). The single-rail
mode is selected if LIM1.DRS is set and MR0.XC1 is
cleared. After reset this pin is in high-impedance state
until register LIM1.DRS is set and XPM2.XLT is cleared.
D3
XL2.2
O
(analog)
–
Transmit Line 2, port 2
Analog output for the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
C4
XL3.2
I (analog) –
Transmit Line 3, port 2
Analog transmit input 1.
C3
XL4.2
I (analog) –
Transmit Line 4, port 2
Analog transmit input 2.
N4
XL1.3
O
(analog)
–
Transmit Line 1, port 3
Analog output to the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
XOID3
O
–
Transmit Optical Interface Data, port 3
Data in CMI code is shifted out with 50% or 100% duty
cycle on both transitions of XCLK3 according to the CMI
coding. Output polarity is selected by bit LIM0.XDOS
(after reset: data is sent active high). The single-rail
mode is selected if LIM1.DRS is set and MR0.XC1 is
cleared. After reset this pin is in high-impedance state
until register LIM1.DRS is set and XPM2.XLT is cleared.
Table 1
I/O Signals (cont’d)
Pin No. Ball
No.
Name
Pin Type Buffer
Type
Function