
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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2
FEATURES
The PM7341 S/UNI-IMA-84 is a monolithic integrated circuit that implements the
ATM Forum Inverse Multiplexing for ATM (IMA 1.1) protocol with backward
compatibility to IMA 1.0 and the Transmission Convergence (TC) layer function.
The S/UNI-IMA-84 has two line side interface modes that determine the total
number of physical links supported: the Scalable Bandwidth Interconnect (SBI)
bus interface mode and the Clock and Data interface mode.
In SBI mode, the S/UNI-IMA-84 supports up to 84 T1, 63 E1 or 3 DS3 (TC only)
physical links where each link is dynamically configurable to support either IMA
1.1, backward compatible IMA 1.0, ATM over T1/E1 or up to three ATM over DS3
streams (using HEC delineation).
In Clock and Data mode, the S/UNI-IMA-84 supports 32 independent T1, E1 or
unchannelized physical links. Each link is dynamically configurable to support
either IMA 1.1, backward compatible IMA 1.0, or ATM HEC cell delineation. ATM
over fractional T1/E1 is also supported. Unchannelized links may be used to
support applications such as G.SHDSL.
Standards Supported
ATM Forum Inverse Multiplexing for ATM Specification Version 1.1, March
1999
ATM Forum Inverse Multiplexing for ATM Specification Version 1.0 – supports
the method of reporting Rx cell information as in Appendix C.8 of the ATM
Forum Inverse Multiplexing for ATM Specification Version 1.1 for symmetrical
configurations with M=128.
I.432-1 B-ISDN user network interface – Physical Layer specification: General
characteristics
I.432-3 B-ISDN user network interface – Physical Layer specification: 1544
kbps and 2048 kbps operation
DS3 Physical Layer Interface Specification, af-phy-0054.000 January, 1996
ATM on Fractional E1/T1, af-phy-0130.00 October, 1999.