
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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10
FUNCTIONAL DESCRIPTION
This section describes the function of each entity in the S/UNI-IMA-84 block
diagram. Throughout this document the use of the term “transmit” implies data
read in from the cell interface and sent out the lineside interface. Conversely,
“receive” is used to describe the data path from the lineside interface to the cell
interface.
The term “virtual PHY” refers to a single flow on the Any-PHY/UTOPIA bus. Each
IMA group or a single TC connection is mapped to a virtual PHY. For simplicity,
both an IMA group and a TC connection will be referenced as a group.
Each IMA group can map data to/from multiple links. Each TC group is mapped
to a single link.
The term “link” refers to either: (1) a T1, E1, or DS3 link that is multiplexed onto
the SBI bus or (2) a single T1/E1 link or unchannelized link on the clock/data
interface. When supporting fractional T1/E1 via the Clock/Data interface, the
timeslots that are chosen to be part of the fractional connection are also referred
to as a link.
Within the clock/data interface, the external links are mapped to a contiguous
space identified as Virtual Links. To support multiple fractional TC flows on a
single external signal, a mapping is used to split a single channelized external
signal into multiple Virtual Links. At the per-link FIFOs, the clock/data Virtual Link
naming convention is used synonymously with the Physical Link naming
convention.
10.1 Any-PHY/UTOPIA Interfaces
The ATM cell interfaces are Any-PHY compliant 8/16 bit slave interfaces which
are compatible with the following options:
Any-PHY Slave
UTOPIA Level 2, 31-port slave (multi-PHY-mode)
UTOPIA Level 2, single port slave (single address mode) for receive side only.