
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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One configured, the links are still disabled. The links must be mapped and
provisioned (enabled)
12.3.2.1
Channelized
When channelized links are chosen, the RCAS/TCAS Framing Bit threshold must
be configured to detect the gap in the clock for the framing bit/byte. This value is
dependent upon frame type T1/E1, serial clock speed and REFCLK frequency.
The Link Disable feature may be used when configuring a link to squelch all data
from a link while it is being provisioned.
For the Tx direction, the data sent in idle timeslots may be selected with the
TCAS Idle Time-slot Fill data.
For T1, all timeslots are used to carry the ATM cell data so all timeslots should be
mapped to the same virtual link. A one-to-one mapping between physical links
and virtual links is recommended.
For E1, timeslots 0 and 16 are used for signaling data and do not contain ATM
cell data. Therefore, timeslots 1-15 and 17-31 must be mapped and provisioned
(enabled) to carry ATM cell data. All of the timeslots in a link should be mapped
to the same virtual link. A one-to-one mapping between physical links and virtual
links is recommended.
For Fractional links, multiple fractional ATM flows may exist on the same physical
link. Each flow should be mapped to a unique virtual link. There is a limit of 84
virtual links for the S/UNI-IMA-84.
12.3.2.2
Unchannelized
Unchannelized is usually used for data streams that are not either T1 or E1
framed. When using the unchannelized interface, the user is responsible for
providing a clock which has all framing or overhead bits gapped out. The S/UNI-
IMA-84 receives/sources one bit of data for each clock pulse.
The unchannelized mode allows a wider range of clock frequencies. As the
serial line frequency increases, the number of links supported decreases.
12.3.2.3
Rules for Chosing Clock frequencies
SYSCLK(min) = Max((50MHz * Line Throughput(Mbps)/130 Mbps), REFCLK)