
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
28
Interface Support
Two line side interface modes: Scalable Bandwidth Interconnect (SBI) bus
and Clock and Data.
SBI Interface:
Supports a byte serial 19.44 MHz Scalable Bandwidth Interconnect (SBI)
bus interface for high-density line-side device interconnection of up to 84
T1, 63 E1, or three DS3 streams.
The SBI interface bus uses three Synchronous Payload Envelopes (SPE)
where each SPE can carry up to 28 framed T1, 21 framed E1, or one
framed DS3 stream.
For SPEs configured to support DS3, TC layer processing is supported
only. IMA is not supported over DS3.
Always acts as a clock slave receiving clock rate information from the SBI
based framer.
Supports Common Transmit Clock (CTC) and Independent Transmit Clock
(ITC) modes across the SBI bus.
Seamlessly interconnects to PMC-Sierra’s PM8315 TEMUX and PM8316
TEMUX-84 highly integrated T1/ E1 framers, M13 MUXs and SONET/SDH
VT/TU mapper devices
Clock/Data Interface:
Supports 32 individual serial (T1 or E1 or unchannelized rates up to 2.304
Mbps) links or 8 individual serial 8Mbps unchannelized links via a 2-pin
clock and data interface.
Supports ATM over fractional T1/E1 by providing the capability to select
any DS0 timeslots that are active in a link.
Serial link interface supports both independent transmit clock (ITC) and
common transmit clock (CTC) options.