
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
vii
10.4.2 RX TC LAYER (RTTC).....................................................116
10.5
LINE SIDE PHYSICAL LAYER...................................................118
10.5.1 TX CLOCK/DATA (TCAS)................................................118
10.5.2 TX NULL FRAMER (SDFR84).........................................119
10.5.3 INSERT SCALEABLE BANDWIDTH INTERCONNECT
(INSBI).............................................................................119
10.5.4 EXTRACT SCALEABLE BANDWIDTH INTERCONNECT
(EXSBI)............................................................................119
10.5.5 RX DEFRAMER (SDDF84) ............................................ 120
10.5.6 RX CLOCK/DATA (RCAS).............................................. 120
10.6
MICROPROCESSOR INTERFACE .......................................... 121
10.6.1 MAPPING AND LINK IDENTIFICATION......................... 121
10.6.2 INTERRUPT DRIVEN ERROR/STATUS REPORTING.. 123
10.6.3 REGISTERS................................................................... 124
11
NORMAL MODE REGISTER DESCRIPTION ..................................... 131
11.1
GLOBAL REGISTERS .............................................................. 132
11.2
MASTER INTERRUPT REGISTERS ........................................ 137
11.3
UTOPIA INTERFACE REGISTERS .......................................... 147
11.4
SDRAM REGISTERS................................................................ 156
11.5
TC LAYER REGISTERS ........................................................... 166
11.6
SBI REGISTERS....................................................................... 177
11.7
LINE CLOCK/DATA INTERFACE.............................................. 203
11.8
RIPP REGISTERS .................................................................... 217