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参数资料
| 型号： | QL1P100-7PUN86C |
| 厂商： | QUICKLOGIC CORP |
| 元件分类： | FPGA |
| 英文描述： | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
| 封装： | 6 X 6 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, TFBGA-86 |
| 文件页数： | 34/44页 |
| 文件大小： | 1101K |
| 代理商： | QL1P100-7PUN86C |
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2010 QuickLogic Corporation
QuickLogic PolarPro Device Data Sheet — 86-Pin TFBGA QL1P100
4
Figure 3: 4-Kilobit Dual-Port RAM Block
The read and write data buses of a RAM block can be arranged to variable bus widths. The bus widths can be
configured using the RAM Wizard available in QuickWorks, QuickLogic’s development software. The selection
of the RAM depth and width determines how the data is addressed.
The RAM blocks also support data concatenation. Designers can cascade multiple RAM modules to increase
the depth or width by connecting corresponding address lines together and dividing the words between
modules. Generally, this requires the use of additional programmable logic resources. However, when
concatenating only two 4-kilobit RAM blocks, they can be concatenated horizontally or vertically without using
any additional programmable fabric resources.
For example, two internal 4-kilobit dual-port RAM blocks can be concatenated vertically to create a 512x18
RAM block or horizontally to create a 256x36 RAM block. A block diagram of horizontal and vertical
concatenation is displayed in Figure 4.
Table 2: RAM Interface Signals
Signal Name
Function
Inputs
WD [17:0]
Write Data
WA [8:0]
Write Address
WEN [1:0]
Write Enable (two 9-bit enables)
WD_SEL
Write Chip Select
WCLK
Write Clock
RA [8:0]
Read Address
RD_SEL
Read Chip Select
RCLK
Read Clock
Output
RD [17:0]
Read Data
RD[17:0]
WD[17:0]
WA[8:0]
WEN[1:0]
WD_SEL
WCLK
RA[8:0]
RD_SEL
RCLK
相关PDF资料 |
PDF描述 |
|---|---|
| QL1P100-7PUN86I | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
| QL1P100-7PUN86M | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
| QL1P100-8PU86C | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
| QL1P100-8PU86M | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
| QL1P100-8PUN86C | FPGA, 640 CLBS, 100000 GATES, PBGA86 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| QL-1RED | 制造商:Panduit Corp 功能描述: |
| QL-1WHT | 制造商:Panduit Corp 功能描述: |
| QL-1YEL | 制造商:Panduit Corp 功能描述:B-SI |
| QL2003 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:3.3V and 5.0V pASIC-R 2 FPGA Combining Speed, Density, Low Cost and Flexibility |
| QL2003-0PF100C | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA) |
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