Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-16
SYM53C040 DATA MANUAL VERSION 2.0
PRELIMINARY
137/E8
SEL_0, D0
When Parallel_ESI is asserted, this
signal contains bit 0 of a data nibble
for read and write operations.
When Parallel_ESI is deasserted,
this signal is the SEL_0 signal,
included for compatibility with
SFF-8045.
Port 1
4 mA open-drain
bidirectional
136/
A8
SEL_1, D1
When Parallel_ESI is asserted, this
signal contains bit 1 of a data nibble
for read and write operations.
When Parallel_ESI is deasserted,
this signal is the SEL_1 signal,
included for compatibility with
SFF-8045.
Port 1
4 mA open-drain
bidirectional
135/B8
SEL_2, D2
When Parallel_ESI is asserted, this
signal contains bit 2 of a data nibble
for read and write operations.
When Parallel_ESI is deasserted,
this signal is the SEL_2 signal,
included for compatibility with
SFF-8045.
Port 1
4 mA open-drain
bidirectional
134/
C8
SEL_3, D3
When Parallel_ESI is asserted, this
signal contains bit 3 of a data nibble
for read and write operations.
When Parallel_ESI is deasserted,
this signal is the SEL_3 signal,
included for compatibility with
SFF-8045.
Port 1
4 mA open-drain
bidirectional
132/
D8
SEL_4,
ENCL_ACK/
When PARALLEL_ESI/ is asserted,
this is an active low acknowledge
signal sourced by the SYM53C040
back to the Fibre Channel device.
When Parallel_ESI is deasserted,
this signal is the SEL_4 signal,
included for compatibility with
SFF-8045.
Port 1
4 mA open-drain
bidirectional
Table 3-7
Pin Assignments for SFF-8067 Mode (Continued)
Pin/
Ball
No.
Signal
Name
Description
8067 Port
Pad
Configuration