Misc. Register FE06h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Misc. Register FE0Eh
A-6
SYM53C040 DATA MANUAL VERSION 2.0
PRELIMINARY
Misc. Register FE06h
Timer 1 Threshold (T1TH)
Read/write
Bits 7-0 T1TH7, T1TH6, T1TH5, T1TH4, T1TH3,
T1THh2, T1TH1, T1TH0 (Timer 1 Threshold )
Misc. Register FE07h
Timer 1 Secondary Chain (T1SC)
Read only
Bit 7 Reserved
Bits 6-0 T1SC6, T1SC5, T1SC4, T1SC3, T1SC2,
T1SC1, T1SC0 (Timer 1 Secondary Chain )
Misc. Register FE08h
Timer 1 Final Chain T1FC
Read only
Bits 7-0 T1FC7, T1FC6, T1FC5, T1FC4, T1FC3,
T1FC2, T1FC1, T1FC0 (Timer 1 Final Chain )
Misc. Register FE09h
Timer 2 Control (T2C)
Read/write
Bit 7 T2EXP ( Timer 2 expired) (read only)
Bit 6 T2RUN ( Timer 2 run)
Bit 5 T2CLR ( Timer 2 clear)
Bit 4 T2PS ( Timer 2 pre-scaler)
Bit 3-1 Reserved
Bit 0 T2IEN ( Timer 2 interrupt enable)
Misc. Register FE0Ah
Timer 2 Threshold (T2T)
Read/write
Bits 7-0 T2TH7, T2TH6, T2TH5, T2TH4, T2TH3,
T2TH2, T2TH1, T2TH0 (Timer 2 Threshold )
Misc. Register FE0Bh
Timer 2 Secondary Chain (T2SC)
Read only
Bit 7 Reserved
Bits 6-0 T2SC6, T2SC5, T2SC4, T2SC3, T2SC2,
T2SC1, T2SC0 (Timer 2 Secondary Chain )
Misc. Register FE0Ch
Timer 2 Final Chain (T2FC)
Read only
Bits 7-0 T2FC7, T2FC6, T2FC5, T2FC4, T2FC3,
T2FC2, T2FC1, T2FC0 (Timer 2 Final Chain )
Misc. Register FE0Dh
Interrupt Mask (IMR)
Read/write
Bit 7 IMR7 (SCSI interrupt)
Bit 6 IMR6 ( 2-wire interface 1 interrupt)
Bit 5 IMR5 ( 2-wire interface 0 interrupt)
Bit 4 IMR4 ( DMA interrupt)
Bit 3 IMR3 ( Timer 2 interrupt)
Bit 2 IMR2 ( Timer 1 interrupt)
Bit 1 IMR1( 8067 Port 1 Interrupt or MPIO3_1
interrupt)
Bit 0 IMR0 ( 8067 Port 0 Interrupt or MPIO3_0
interrupt)
Misc. Register FE0Eh
Interrupt Destination (IDR)
Read/write
Bit 7 IDR7 ( SCSI interrupt)
Bit 6 IDR6 ( 2-wire interface 1 interrupt)
Bit 5 IDR5 ( 2-wire interface 0 interrupt)
Bit 4 IDR4 ( DMA interrupt)
Bit 3 IDR3 ( Timer 2 interrupt)
Bit 2 IDR2 ( Timer 1 interrupt)
Bit 1 IDR1( 8067 Port 1 interrupt or MPIO3_1
interrupt)
Bit 0 IDR0 ( 8067 Port 0 interrupt or MPIO3_0
interrupt)
TITH7 TITH6 TITH5 TITH4 TITH3 TITH2 TITH1 TITH0
7
654
321
0
Defaults:
0
000
0
RES
T1SC6 T1SC5 T1SC4 T1SC3 T1SC2 T1SC1 T1SC0
7
654
321
0
Defaults:
X
000
0
T1FC7 T1FC6 T1FC5 T1FC4 T1FC3 T1FC2 T1FC1 TQFC0
7
654
321
0
Defaults:
0
000
0
T2_EXP T2RUN
T2CLR T2PS
RES
T2IEN
7
654
321
0
Defaults:
0
000
X
0
TWTH7
T2TH6 T2TH5 T2TH4 T2TH3 T2TH2 T2TH1 T2TH0
7
654
321
0
Defaults:
0
000
0
RESE T2SC6 T2SC5 T2SC4 T2SC3 TWSC
2
T2SC1 T2SC0
7
654
321
0
Defaults:
X
000
0
T2FC7 T2FC6 T2FC5 T2FC4 T2FC3 T2FC2 T2FC1 T2FC0
7
654
321
0
Defaults:
0
000
0
IMR7 IMR6 IMR5 IMR4 IMR3 IMR2 IMR1 IMR0
7
654
321
0
Defaults:
0
000
0
IDR7
IDR6
IDR5
IDR4
IDR3
IDR2
IDR1
IDR0
7
654
321
0
Defaults:
0
000
0