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参数资料
型号： TMS320C542PGE-40
厂商： TEXAS INSTRUMENTS INC
元件分类： 数字信号处理
英文描述： 16-BIT, 100 MHz, OTHER DSP, PQFP144
封装： PLASTIC, QFP-144
文件页数： 103/111页
文件大小： 1467K
代理商： TMS320C542PGE-40
TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
91
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
serial port transmit timing
switching characteristics over recommended operating conditions for serial port transmit with
external clocks and frames (see Figure 33)
PARAMETER
’C54x-40
’LC54x-40
’LC54x-50
’54x-66
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
td(DX)
Delay time, DX valid after CLKX rising
25
ns
th(DX)
Hold time, DX valid after CLKX rising
–5
– 5
ns
tdis(DX)
Disable time, DX after CLKX rising
40
ns
timing requirements for serial port transmit with external clocks and frames [H = 0.5tc(CO)]
(see Figure 33)
’C54x-40
’LC54x-40
’LC54x-50
’54x-66
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
tc(SCK)
Cycle time, serial port clock
6H
6H
6H
ns
td(FSX)
Delay time, FSX after CLKX rising edge
2H – 8
2H – 5
2H–5
ns
th(FSX)
Hold time, FSX after CLKX falling edge (see Note 1)
7
6
ns
th(FSX)H Hold time, FSX after CLKX rising edge (see Note 1)
2H – 8
2H – 5
2H–5
ns
tf(SCK)
Fall time, serial port clock
6
ns
tr(SCK)
Rise time, serial port clock
6
ns
tw(SCK)
Pulse duration, serial port clock low/high
3H
ns
The serial port design is fully static and, therefore, can operate with tc(SCK) approaching ∞. It is characterized approaching an input frequency
of 0 Hz but tested at a much higher frequency to minimize test time.
If the FSX pulse does not meet this specification, the first bit of serial data is driven on DX until the falling edge of FSX. After the falling edge of
FSX, data is shifted out on DX pin. The transmit buffer-empty interrupt is generated when the th(FSX) and th(FSX)H specification is met.
NOTE 1: Internal clock with external FSX and vice versa are also allowable. However, FSX timings to CLKX always are defined depending on
the source of FSX, and CLKX timings always are dependent upon the source of CLKX. Specifically, the relationship of FSX to CLKX
is independent of the source of CLKX.
DX BIT
FSX
CLKX
8/16
7/15
2
1
th(DX)
td(DX)
tw(SCK)
tc(SCK)
td(FSX)
th(FSX)H
th(FSX)
tdis(DX)
tr(SCK)
tf(SCK)
Figure 33. Serial Port Transmit Timing With External Clocks and Frames
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