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参数资料
| 型号： | TMS320C542PGE-40 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 16-BIT, 100 MHz, OTHER DSP, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 34/111页 |
| 文件大小： | 1467K |
| 代理商： | TMS320C542PGE-40 |
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TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
29
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
host-port interface (’542, ’545, ’548, and ’549 only) (continued)
Data transfers of 16-bit words occur as two consecutive bytes with a dedicated pin (HBIL) indicating whether
the high or low byte is being transmitted. Two control pins, HCNTL1 and HCNTL0, control host access to the
HPIA, HPI data (with an optional automatic address increment), or the HPIC. The host can interrupt the DSP
device by writing to HPIC. The DSP device can interrupt the host with a dedicated HINT pin that the host can
acknowledge and clear.
The HPI has two modes of operation, shared-access mode (SAM) and host-only mode (HOM). In SAM, the
normal mode of operation, both the DSP device and the host can access HPI memory. In this mode,
asynchronous host accesses are resynchronized internally and, in case of conflict, the host has access priority
and the DSP device waits one cycle. The HOM capability allows the host to access HPI memory while the DSP
device is in IDLE2 (all internal clocks stopped) or in reset mode. The host can therefore access the HPI RAM
while the DSP device is in its optimal configuration in terms of power consumption.
The HPI control register has two data strobes, HDS1 and HDS2, a read / write strobe HR / W, and an address
strobe HAS, to enable a glueless interface to a variety of industry-standard host devices. The HPI is interfaced
easily to hosts with multiplexed address /data bus, separate address and data buses, one data strobe and a
read / write strobe, or two separate strobes for read and write.
The HPI supports high-speed back-to-back accesses.
D In the SAM, the HPI can handle one byte every five DSP device periods—that is, 64 MBps with a 40-MIPS
DSP, or 160 MBps with a 100-MIPS DSP. The HPI is designed so that the host can take advantage of this
high bandwidth and run at frequencies up to (f
n) ÷ 5, where n is the number of host cycles for an external
access and f is the DSP device frequency.
D In HOM, the HPI supports high-speed back-to-back host accesses at 1 byte every 50 ns—that is, 160 MBps
with a -40 or faster DSP.
serial ports
The ’54x devices provide high-speed full-duplex serial ports that allow direct interface to other ’54x devices,
codecs, and other devices in a system. There is a standard serial port, a time-division-multiplexed (TDM) serial
port, and a buffered serial port (BSP). The ’549 devices provides a misalignment detection feature to that allows
the device to detect when a word or words are lost in the serial data line.
The general-purpose serial port utilizes two memory-mapped registers for data transfer: the data-transmit
register (DXR) and the data-receive register (DRR). Both of these registers can be accessed in the same
manner as any other memory location. The transmit and receive sections of the serial port each have associated
clocks, frame-synchronization pulses, and serial-shift registers; and serial data can be transferred either in
bytes or in 16-bit words. Serial port receive and transmit operations can generate their own maskable transmit
and receive interrupts (XINT and RINT), allowing serial-port transfers to be managed through software. The ’54x
serial ports are double-buffered and fully static.
The TDM port allows the device to communicate through time-division multiplexing with up to seven other ’54x
devices with TDM ports. Time-division multiplexing is the division of time intervals into a number of subintervals
with each subinterval representing a prespecified communications channel. The TDM port serially transmits
16-bit words on a single data line ( TDAT ) and destination addresses on a single address line ( TADD). Each
device can transmit data on a single channel and receive data from one or more of the eight channels, providing
a simple and efficient interface for multiprocessing applications. A frame synchronization pulse occurs once
every 128 clock cycles, corresponding to the transmission of one 16-bit word on each of the eight channels. Like
the general-purpose serial port, the TDM port is double-buffered on both input and output data.
The buffered serial port (BSP) consists of a full-duplex double-buffered serial-port interface and an
auto-buffering unit (ABU). The serial port block of the BSP is an enhanced version of the standard serial port.
The ABU allows the serial port to read / write directly to the ’54x internal memory using a dedicated bus
independent of the CPU. This results in minimal overhead for serial port transactions and faster data rates.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TMS320C54CST | 制造商:TI 制造商全称:Texas Instruments 功能描述:Client Side Telephony DSP |
| TMS320C54CSTGGU | 功能描述:数字信号处理器和控制器 - DSP, DSC DSP for Client-Side Telephony RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| TMS320C54CSTPGE | 功能描述:数字信号处理器和控制器 - DSP, DSC DSP for Client-Side Telephony RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| TMS320C54CSTZGU | 功能描述:数字信号处理器和控制器 - DSP, DSC DSP for Client-Side Telephony RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| TMS320C54V90 | 制造商:TI 制造商全称:Texas Instruments 功能描述:EMBEDDED V.90 MODEM DSP |
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