CHAPTER 3 CPU FUNCTION
User’s Manual U16541EJ5V1UD
84
(7/11)
Manipulatable Bits
Address
Function Register Name
Symbol
R/W
1
8
16
Default Value
FFFFF590H
TMP0 control register 0
TP0CTL0
√
00H
FFFFF591H
TMP0 control register 1
TP0CTL1
√
00H
FFFFF592H
TMP0I/O control register 0
TP0IOC0
√
00H
FFFFF593H
TMP0I/O control register 1
TP0IOC1
√
00H
FFFFF594H
TMP0I/O control register 2
TP0IOC2
√
00H
FFFFF595H
TMP0 option register 0
TP0OPT0
√
00H
FFFFF596H
TMP0 capture/compare register 0
TP0CCR0
√
0000H
FFFFF598H
TMP0 capture/compare register 1
TP0CCR1
R/W
√
0000H
FFFFF59AH
TMP0 counter read buffer register
TP0CNT
R
√
0000H
FFFFF5A0H
TMP1 control register 0
TP1CTL0
√
00H
FFFFF5A1H
TMP1 control register 1
TP1CTL1
√
00H
FFFFF5A2H
TMP1I/O control register 0
TP1IOC0
√
00H
FFFFF5A3H
TMP1I/O control register 1
TP1IOC1
√
00H
FFFFF5A4H
TMP1I/O control register 2
TP1IOC2
√
00H
FFFFF5A5H
TMP1 option register 0
TP1OPT0
√
00H
FFFFF5A6H
TMP1 capture/compare register 0
TP1CCR0
√
0000H
FFFFF5A8H
TMP1 capture/compare register 1
TP1CCR1
R/W
√
0000H
FFFFF5AAH
TMP1 counter read buffer register
TP1CNT
R
√
0000H
FFFFF5B0H
TMP2 control register 0
TP2CTL0
√
00H
FFFFF5B1H
TMP2 control register 1
TP2CTL1
√
00H
FFFFF5B2H
TMP2I/O control register 0
TP2IOC0
√
00H
FFFFF5B3H
TMP2I/O control register 1
TP2IOC1
√
00H
FFFFF5B4H
TMP2I/O control register 2
TP2IOC2
√
00H
FFFFF5B5H
TMP2 option register 0
TP2OPT0
√
00H
FFFFF5B6H
TMP2 capture/compare register 0
TP2CCR0
√
0000H
FFFFF5B8H
TMP2 capture/compare register 1
TP2CCR1
R/W
√
0000H
FFFFF5BAH
TMP2 counter read buffer register
TP2CNT
R
√
0000H
FFFFF5C0H
TMP3 control register 0
TP3CTL0
√
00H
FFFFF5C1H
TMP3 control register 1
TP3CTL1
√
00H
FFFFF5C2H
TMP3I/O control register 0
TP3IOC0
√
00H
FFFFF5C3H
TMP3I/O control register 1
TP3IOC1
√
00H
FFFFF5C4H
TMP3I/O control register 2
TP3IOC2
√
00H
FFFFF5C5H
TMP3 option register 0
TP3OPT0
√
00H
FFFFF5C6H
TMP3 capture/compare register 0
TP3CCR0
√
0000H
FFFFF5C8H
TMP3 capture/compare register 1
TP3CCR1
R/W
√
0000H
FFFFF5CAH
TMP3 counter read buffer register
TP3CNT
R
√
0000H
FFFFF5D0H
TMP4 control register 0
TP4CTL0
√
00H
FFFFF5D1H
TMP4 control register 1
TP4CTL1
√
00H
FFFFF5D2H
TMP4I/O control register 0
TP4IOC0
√
00H
FFFFF5D3H
TMP4I/O control register 1
TP4IOC1
√
00H
FFFFF5D4H
TMP4I/O control register 2
TP4IOC2
√
00H
FFFFF5D5H
TMP4 option register 0
TP4OPT0
√
00H
FFFFF5D6H
TMP4 capture/compare register 0
TP4CCR0
√
0000H
FFFFF5D8H
TMP4 capture/compare register 1
TP4CCR1
R/W
√
0000H